Identity circuit for an integrated circuit using a fuse and tran

Details Identity circuit for an integrated circuit using a fuse and tran Identity circuit for an integrated circuit using a fuse and tran

1986-12-22

1987-12-29

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072021, 307441, 307468, 307594, H03K 1718

Patent

active

047163020

ABSTRACT:
An integrated circuit has an identifying circuit coupled to an input. The input has ESD protection. The identifying circuit has a fuse which is in one of two possible states to provide the identifying information. A power on reset circuit provides a pulse in response to application of power to the integrated circuit. A current path between a power supply terminal and the input is provided in response to the power on reset pulse when the fuse is in one state. This current path is blocked when the fuse is in the other state. A user is thus provided with identifying information by the presence or absence of a current path at the input at the time when power is applied.

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Pujol, "COS/MOS Electrostatic Discharge Protection Networks", Electronic Technology, vol. 13, Feb. 1979, pp. 40-42.
Gepraegs et al., "Restore Suppression for Partially Good Dynamic FET Array Chips", IBM T.D.B., vol. 27, No. 1, Jun. 1980, pp. 211-212.

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