Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2005-09-06
2005-09-06
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S151000, C438S164000, C438S001000, C438S029000, C438S149000, C257S254000, C257S273000, C327S513000, C327S378000, C327S539000, C327S541000, C327S316000, C330S20700P, C330S266000
Reexamination Certificate
active
06939736
ABSTRACT:
A method of reducing package stress includes placing matched components of an op-amp substantially in a region of a die having the least stress gradients. The region is located in the center of the die. Further, the center is the common centroid of the die. The matched components are the current mirror input stages of the op-amp. In one embodiment, a semiconductor configuration includes a die having a region with the least stress gradients, and an op-amp containing matched components that are located substantially in the region.
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Clinton Brian Lance
Grabham Marty A.
Anya Igwe U.
Brady III Wade James
Smith Matthew
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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