ID protected memory with a readable/writable ID template

Details ID protected memory with a readable/writable ID template ID protected memory with a readable/writable ID template

1990-12-04

1994-03-22

Lee, Thomas C.

Boots, shoes, and leggings

3649694, 364969, 3649561, 364956, 364DIG2, 3642865, 364 1, 3642864, 3642531, 364253, 3642469, 3642466, 364DIG1, G06F 1214

Patent

active

052972682

ABSTRACT:
A CPU (28) accesses remotely disposed RAM (12) through a common serial data link. The RAM is interfaced to the common data link under the control of an arbiter circuit (10). The arbiter includes a protocol shift register (31) for receiving control information, ID information, and address information for the RAM. The incoming ID information is compared with an ID template (37), and:

REFERENCES:
patent: 4038645 (1977-07-01), Birney et al.
patent: 4434464 (1984-02-01), Suzuki et al.
patent: 4777589 (1988-10-01), Boettner et al.
patent: 4954982 (1990-09-01), Tateishi et al.

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