IC testing apparatus and testing method using same

Details IC testing apparatus and testing method using same IC testing apparatus and testing method using same

1999-12-20

2001-11-06

Metjahic, Safet (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB

Reexamination Certificate

active

06313657

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to an IC testing apparatus and a testing method using the apparatus which are used to execute a DC test in which a direct current or d. c. voltage is applied to a terminal on an IC under test to examine a voltage or current characteristic occurring at that terminal and a functional test to see whether or not the IC operates normally.
FIG. 1
is an illustration of a conventional IC testing apparatus in summary. IC testing apparatus
20
comprises a DC tester
30
, a functional tester
40
and a controller
50
which controls both of them.
A DC test includes a current-applied voltage measuring test in which a known current is passed through a terminal P of an IC under test
10
to determine a voltage VX developed at the terminal P to see if the voltage VX lies within a predetermined voltage range, and a voltage-applied current measuring test to examine if a predetermined current passes through the terminal P of the IC under test when a given voltage is applied to the terminal.
The DC tester
30
shown in FIG. I indicates an arrangement for the current-applied voltage measuring test. Specifically, in this test, the tester
30
includes a current source
31
and voltage measuring means
32
. The current source
31
supplies a current IS of a known magnitude to the terminal P of the IC under test
10
through a force line FOR. The voltage measuring means
32
then determines a voltage VX which is developed at the terminal P of the IC under test
10
through a sense line SEN.
FIGS. 2 and 3
graphically show maximum assurance characteristic curves CL
1
and CL
2
and minimum assurance characteristic curves CL and CL
4
based on results of measurement of current-voltage responses of P-channel FET
61
and N-channel FET
62
contained in output means
60
of the IC under test
10
. In the current-applied voltage measuring test, a predetermined current IOH or IOL is passed through the terminal P to measure a resulting voltage VDS developed at the terminal P in order to determine if the resulting voltage-current response is contained in a range defined between the maximum and the minimum assurance characteristic curve, thus determining if the IC under test
10
is acceptable or faulty.
A first switch S
1
and a second switch S
2
are connected in series with the sense line SEN and the force line FOR, respectively. The first switch S
1
and the second switch S
2
are controlled by the controller
50
to be turned on for the direct current test and turned off for the functional test. In
FIG. 1
, a resistor R
1
shown within a block indicated by S
1
represents an on resistance of the switch S
1
when it is turned on. Similarly, a resistor R
2
shown within a block indicated by S
2
represents an on resistance of the switch S
2
.
The functional tester
40
comprises a driver DR which applies a test pattern signal to the IC under test
10
, a voltage comparator CP which determines whether or not a response signal from the IC under test
10
has a logic level of a voltage which satisfies a voltage requirement, and a programmable load PL which is used to examine ira given current IH or IL passes through the terminal P of the IC under test
10
during the functional test, with a common junction between the driver DR, the voltage comparator CP and the programmable load PL being connected to the terminal P of the IC under test
10
through a third switch S
3
. While not shown, it should be understood that the functional tester
40
also includes a function of generating a test pattern to be applied to the driver DR, a function of confirming that a proper logic level is delivered from the output of the voltage comparator CP at a preset timing or like functions, in a similar manner as in known IC testing apparatus. During the functional test, in order to determine if a voltage delivered from the terminal P of the IC under test
10
has a proper logic level, it is necessary that the driver DR exhibits a sufficiently high output impedance so as to be substantially isolated from the voltage comparator CP while a reference voltage VOH of a high logic level (H) be applied to the inverting input terminal of a voltage comparator CP
1
and a reference voltage VOL of a low logic level (L) be applied to the non-inverting input terminal of a voltage comparator CP
2
. An output voltage from the terminal P of the IC under test
10
is compared against the reference voltages VOH and VOL by the voltage comparators CP
1
and CP
2
, respectively. If the output voltage of the IC under test
10
assumes a proper high logic level, the voltage comparator CP
1
delivers a high level output. If the output voltage of the IC under test
10
assumes a proper low logic level, the voltage comparator CP
2
delivers a high level output. The controller
50
arranges for a sufficiently high output impedance of the driver DR and sets up the reference voltages VOH and VOL. During the functional test, the controller
50
also turns the third switch S
3
on and turns the first switch S
1
and the second switch S
2
off.
FIG. 4
shows an arrangement of the DC tester
30
for the voltage-applied current measuring test. In this instance, the current source
31
is formed by an operational amplifier OP having its non-inverting input terminal connected to a voltage source
33
to receive a voltage EV therefrom. The operational amplifier OP also includes an output terminal which is connected through a force line FOR to a terminal P of an IC under test
10
. A current detecting resistor Ri and a second switch S
2
are connected in series in the force line FOR to apply a voltage to the terminal P of the IC under test
10
. A voltage at the terminal P is fed back to the inverting input terminal of the operational amplifier OP through a sense line SEN and a first switch S
1
. The feedback is effective to maintain a voltage EV' which is applied to the terminal P of the IC under test
10
to be equal to the voltage EV of the voltage source
33
. The arrangement allows any voltage of a known value to be applied to the terminal P of the IC under test
10
by choosing an arbitrary value for the voltage EV of the voltage source
33
. Under the condition that a known voltage is applied, a voltage developed across the current detecting resistor Ri is measured by voltage measuring means
34
, thus determining a current IOL or IOH which is either supplied to the IC under test
10
through the force line FOR or discharged from the IC under test
10
through the force line FOR. In this manner, the combination of the current detecting resistor Ri and the voltage measuring means
34
defines current measuring means IM.
The first switch S
1
and the second switch S
2
are turned on, during the voltage-applied current measuring test, but are turned off during the functional test to isolate the direct current tester
30
from the terminal P of the IC under test
10
. During the DC test, the third switch S
3
is controlled to be turned off, thus isolating the functional tester
40
from the terminal P of the IC under test
10
, in the similar manner as shown in the arrangement of FIG.
1
. Such controls are exercised by the controller
50
.
As mentioned, the third switch S
3
is provided to isolate the functional tester
40
during the DC test, while the first switch S
1
and the second switch S
2
are provided to isolate the DC tester
30
during the functional test. In the conventional practice, these switches S
1
to S
3
are served by reed relays. Reed relays are used for the reason that when used as the first to the third switch S
1
, S
2
and S
3
, they exhibit a low on resistance, as represented by R
1
, R
2
and R
3
, and allow for a relatively high current capacity on the order of 0.3 to 0.5 A, permitting a single reed relay to feed an amount of current which may be passed to the IC under test
10
.
Specifically, the DC test includes a mode in which a direct current response of an IC under test is examined with a current flow in a normal range which may be on the order of 4 to 50 mA, and an overl

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