Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-04-01
2003-06-03
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010, C324S754090, C324S1540PB
Reexamination Certificate
active
06573739
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an IC testing apparatus for testing one or more semiconductor integrated circuit devices (hereinafter referred to as an “IC” or “ICs”), more particularly relates to an IC testing apparatus superior in positioning accuracy of an IC or ICs to a contact section.
2. Description of the Related Art
An IC testing apparatus called a “handler” conveys a large number of ICs held on a tray to the inside of a testing apparatus where the ICs are made to electrically contact a test head, then the IC testing unit is made to perform the test. When the test is ended, the ICs are conveyed out from the test head and reloaded on trays in accordance with the results of the tests so as to sort them into categories of good ICs and defective ones.
In an IC testing apparatus of the related art, the trays for holding the DUTs (Devices under test) to be tested or the tested DUTs (hereinafter referred to the “customer trays”) and the trays conveyed circulated inside the IC testing apparatus (hereinafter referred to as the “test trays”) are different in type. In this type of IC testing apparatus, the ICs are switched between the customer trays and the test trays before and after the test. In the test process where the ICs are tested by being brought into contact with the test head, the ICs are pushed against the test head in the state held on the test trays.
In the case of a ball grid array (BGA) type IC, however, the contact section of the test head
104
, as shown in
FIG. 12
, is comprised of a plurality of retractable contact pins
51
biased upward by springs (not shown). The front ends, as shown by the part B in
FIG. 13
, are formed with conical indentations
51
a
mating with the ball-shaped input-output terminals of the DUTs (hereinafter also referred to as the “solder balls HB”).
In a conventional IC testing apparatus performing a test on ICs in a state held on a test tray, the DUTs are received at inserts attached to the test tray and the DUTs are pushed against the contact pins in a state with the inserts and socket guides positioned with respect to each other, therefore the total positional deviation between the DUTs and the contact pins becomes &Dgr;a+&Dgr;b+&Dgr;c+&Dgr;d of the positional deviation &Dgr;a between the ICs and inserts, the positional deviation &Dgr;b between the inserts and the sockets, the positional deviation &Dgr;c between the socket guides and the socket bodies, and the positional deviation &Dgr;d between the socket bodies and the contact pins.
Therefore, as shown in part C of
FIG. 13
, the solder balls HB are pushed against the contact pins in an offset state and the solder balls HB are liable to be damaged by the sharp front ends of the contact pins
51
.
In particular, with a chip size package (CSP) etc., since the dimensional accuracy of the package mold PM is extremely rough and the positional accuracy between the outer circumferential shape and the solder balls HB is not necessarily guaranteed, if an IC is positioned with respect to an insert by the outer circumferential surface of the package mold PM, the total positional deviation becomes remarkable.
If the dimensional accuracies of the inserts, socket guides, socket bodies, and contact pins are improved, it would be possible to reduce the total positional deviations &Dgr;a to &Dgr;d, but there are certain limits as to how much these dimensional accuracies can be built in.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an IC testing apparatus superior in accuracy of positioning of a DUT with a contact section.
According to the present invention, there is provided a IC testing apparatus for testing one or more semiconductor devices: comprising a contact section which is provided at a test head and wherein input-output terminals of said semiconductor devices are pushed against, a tray which holds semiconductor devices on, and a guide which is provided at said contact section and said semiconductor devices are contacted and positioned thereby.
In the IC testing apparatus of the present invention, the DUT and contact section are not positioned indirectly through a plurality of members. A guide for positioning the DUT is provided directly at the contact section, therefore the positional deviation occurring between a DUT and the contact section becomes only the positional deviation between the DUT and the guide (&Dgr;e) and the positional deviation between the guide and the contact section itself (&Dgr;f). Here, for the positional deviation between the guide and the contact section itself, the dimensional accuracy is remarkably improved by adopting one-piece molding or other technique. Further, for the positional deviation between the DUT and the guide as well, since the guide itself is improved in dimensional accuracy by the molding technique, only the error in the manufacturing accuracy of the DUT itself becomes a problem.
In this way, since the error occurring between the DUT and the contact section is remarkably reduced, the positioning accuracy of the input-output terminals of the DUT with respect to the contact section is remarkably improved and as a result it is possible to prevent damage to the input-output terminals due to the contact section.
The set position of the guide of the present invention is not limited so long as it is at the contact section of the test head. All positions are included. For example, the guide is provided at either of the socket where the contact pins are provided or the socket guide which positions the socket. Of course, in the IC testing apparatus of the present invention, the positions of the socket board etc. are also included.
The DUT used in the present invention is not particularly limited. All types of ICs are included. As in the IC testing apparatus, however, the effect is particularly notable if the invention is applied to a so-called ball grid array type IC where the input-output terminals of the DUT are ball-shaped terminals.
The guide in the present invention is not particularly limited in its shape (does not matter if it positions continuously or positions partially), set position, number, materials, positioning location of DUT, etc. so long as it functions to contact and position a DUT. All are included.
The IC testing apparatus of the present invention is particularly preferably an IC testing apparatus of the type which pushes a DUT against a contact section of a test head in a state carried on a tray.
REFERENCES:
patent: 5177435 (1993-01-01), Kiyokawa et al.
patent: 5247248 (1993-09-01), Fukumaga
patent: 5788084 (1998-08-01), Onishi et al.
patent: 6066822 (2000-05-01), Nemoto et al.
patent: 6078188 (2000-06-01), Bannai et al.
patent: 6300781 (2001-10-01), Yap et al.
patent: 6208155 (2002-03-01), Barabi et al.
Advantest Corporation
Cuneo Kamand
Nguyen Jimmy
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