IC stack utilizing secondary leadframes

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

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Details

257685, 257398, 257696, 257723, 257730, 257666, H01L 2348

Patent

active

060283521

ABSTRACT:
A structure and process are disclosed in which IC chip-containing layers are stacked to create electronic density. Each layer is formed by mechanically and electrically joining an IC-containing TSOP with an external leadframe. Each leadframe contains conductors which are disposed to connect with TSOP leads, transpose signals to other locations on the periphery of the TSOP, and/or connect with other layers in the stack. The TSOP/leadframe layers are stacked and joined, and the leadframe terminals of the lowest layer are disposed to facilitate connection with a PCB or other circuitry.

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