IC device compatible with input signals in the formats for two-l

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G06F 1338, G06F 1300

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active

047697814

ABSTRACT:
An IC device has a first terminal for inputting date in the format for a four-line or two-line type bus line, and for outputting data, a second terminal for receiving a chip select signal, a third terminal for receiving a clock pulse, a fourth terminal for outputting data a first signal processor for receiving data from the first terminal in the format for a two-line type bus line and including an address signal and for outputting the data such first signal processor including a detector for detecting the address signal, a second signal processor for receiving the data supplied from the first terminal in the format of a four-line type bus line and outputting the data to the fourth terminal, the first and second signal processors being selectively enabled in accordance with the chip select signal, and a control unit for receiving the signal from the first or second signal processor and outputting the data to the first terminal or the first or second signal processors.

REFERENCES:
patent: 4174536 (1979-11-01), Misunas et al.
patent: 4306298 (1981-12-01), McElroy
patent: 4309754 (1982-01-01), Dinwiddie, Jr.
patent: 4449202 (1984-05-01), Knapp et al.
Serial Data Controller (SDC) P/N 10930, Rockwell Parallel Processing System (PPS) product description, Document No. 10930, N40, Jul. 1975.

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