IC Clamping circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307562, 307571, 307592, H03K 17687, H03K 308

Patent

active

043073069

ABSTRACT:
An integrated circuit having circuitry for clamping input terminals that remain unconnected after assembly into a system. A transistor is connected to clamp the input terminal to reference potential and provide regenerative feedback to a NAND circuit forming a latch which maintains the transistor on when the input terminal would otherwise be left floating. Alternatively, when the terminal is connected to supply potential, the transistor is maintained "off", precluding loss of power.

REFERENCES:
patent: 3159751 (1964-12-01), Bogdan, Jr. et al.
patent: 3191067 (1965-06-01), Zimmerman
patent: 3303843 (1967-02-01), Apple
patent: 3636385 (1972-01-01), Koepp
patent: 3878405 (1975-04-01), Sylvan
patent: 4094139 (1978-06-01), Nomura et al.
patent: 4130988 (1978-12-01), Scherrer et al.
IBM Technical Disclosure Bulletin, vol. 13, No. 5, Oct. 1970, by W. Fischer et al., "Resistor-thick Oxide FET Gate Protection Device for Thin Oxide FET", pp. 1272 and 1273.

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