IC chip with noise suppression circuit

Details IC chip with noise suppression circuit IC chip with noise suppression circuit

1983-12-30

1986-04-29

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307446, 307475, 307481, H03K 19092, H03K 19096

Patent

active

045859582

ABSTRACT:
A microprocessor chip is adapted to maintain its databus at a reference voltage level during idle times between outputs. The arrangement enables like pull-up and pull-down delays as well as low noise levels to be achieved in the output circuits.

REFERENCES:
patent: 3912947 (1975-10-01), Buchanan
patent: 4027294 (1977-05-01), Meusburger et al.
patent: 4042833 (1977-08-01), Lesser
patent: 4398106 (1983-08-01), Davidson et al.
patent: 4414480 (1983-11-01), Zasio
patent: 4437022 (1984-03-01), Miersch et al.
patent: 4477736 (1984-10-01), Onishi
patent: 4488066 (1984-12-01), Shoji

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