Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2002-06-14
2003-06-17
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S684000, C257S688000, C257S691000, C257S782000
Reexamination Certificate
active
06580163
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to integrated circuit (IC) packaging. More particularly, the present invention relates to the placement of the IC die in a package, to improve radio frequency (RF) signal transmission.
BACKGROUND OF THE INVENTION
In the art of IC manufacturing, it is common to encase an IC in a larger package, which is typically made of a ceramic. The IC, also referred to as a die, is typically placed in the centre of the package.
FIG. 1
illustrates a typical integrated circuit packaging assembly
100
. Die
102
is placed in the centre of package
104
. Die
102
has a plurality of die bond pads
106
through which an external interface is provided. Die bond pads
106
are connected to either package bond pads
108
, or to a ground plane
110
that surrounds die
102
on package
104
. The connection between die bond pads
106
and either package bond pads
108
or ground plane
110
is provided by bond wires
112
. Package bond pads
108
typically connect to pins that are used to externally connect with a printed circuit board to integrate die
102
within a larger circuit. In this configuration bond wires
112
are generally symmetrical and approximately the same length.
Much progress has been made to miniaturise dies. Smaller dies allow for both increased speed and lowered costs. In many IC's common to the art, the interface between the IC and external components is made through a series of pins attached to the package. For a number of reasons, including pin and signal integrity there is a minimum pin size and pin spacing that must be respected. Thus, the number of pins required that interface with external components and the minimum pin size establish a minimum packaging size. Package size is typically determined based on a series of constraints set for the first production run of the IC package. Subsequent to the first production run, it is common for revisions to be made to the die design. These revisions often result in smaller die size as a result of improvements in manufacturing processes. However, this does not shrink the overall packaging size, which remains constant so that the board that houses the IC does not have to undergo a costly redesign. Bond wires are used to create an interface between the die and the pins of the larger packaging. This allows for the die to be shrunk while maintaining a standard packaging size, which allows newer components to replace older components without a board level redesign. By shrinking the die in this manner while maintaining packaging size, cost savings can be obtained without increased redesign costs.
Due to the high frequency of the transmitted signals, bond wires act like inductors. This inductance introduces an impedance, which at RF frequencies, results in reflection of the incident signal and a corresponding increase in insertion loss. The inductance is proportional to the length of the bond wire. Inductance in bond wires
112
impairs the propagation of RF signals from die
102
to the pins on package
104
. Because packaging sizes cannot be altered without redesign of entire boards, minimising the distance between die bond pads and package bond pads requires locating die bond pads near their packaging counterparts. As the die shrinks this distance is increased if the dies remains positioned in the middle of the packaging. Conventional designs maintain a central die placement to allow simplified calculation of signal propagation times in timing dependant operations. Increased bond wire length is detrimental to RF signals that suffer from an induced inductance in the bond wires.
As stated above, the size of the chip packaging is fixed because of the number of pins. The pins are spaced apart a minimum distance, and as such this pin spacing defines the minimum length of a side of the package. Therefore, the size of the package cannot be simply reduced to equal the die size in order to improve RF signal performance.
It is, therefore, desirable to provide an integrated circuit packaging that reduces bond wire length to minimize cross talk and inductance in the bond wires, which will result in improved RF signal performance.
SUMMARY OF THE INVENTION
It is an object of the present invention to obviate or mitigate at least one disadvantage of previous integrated circuit packaging assemblies. It is a further object of the present invention to provide an integrated circuit packaging assembly with reduced bond wire length for RF signal transmission.
In a first aspect, the present invention provides an integrated circuit packaging assembly having a package, a ground plane, and integrated circuit and bond wires. In this first aspect the package has both external interface elements and bond pads electrically connected to each other. The ground plane is embedded in the package, for connecting to an electrical ground. The integrated circuit die has bond pads and is set into the package in a position offset from the center of the package. This offset position reduces the distance between a subset of the die bond pads and a subset of the package bond pads. The bond wires electrically connect the die bond pads to either the package bond pads or to the ground plane.
In a further embodiment, the integrated circuit packaging has pins as the external interface, and the die is circumscribed by the ground plane. In alternate embodiments the integrated circuit die is either unidirectionally or bi-directionally offset from the center of the package. In a further embodiment of the present invention at least one of the bond wires connecting the subset of the die bond pads and the subset of the package bond pads carries radio frequency signals. In other embodiments at least one of the bond wires connecting the die bond pads not in the subset of the die bond pads and the package bond pads not in the subset of the package bond pads carries either low frequency or direct current signals.
Other aspects and features of the present invention will become apparent to those ordinarily skilled in the art upon review of the following description of specific embodiments of the invention in conjunction with the accompanying figures.
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Jones Day
Loke Steven
Meyer Charles B.
Pathiyal Krishna K.
Research In Motion Limited
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