IC chip package

Details IC chip package IC chip package

2006-01-10

2006-01-10

Zarneke, David A. (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Wire contact, lead, or bond

Reexamination Certificate

active

06984896

ABSTRACT:
An IC chip packaging comprises a carrier having a topside, a bottom side and a passage having an opening on the topside and another opening on the bottom side, a chip mounted on the topside of the carrier and covering the opening on the topside, a plurality of bonding wires each having one end electrically connected to said chip covered on the opening on the topside and an opposite end horizontally electrically connected to the bottom side of the carrier through the opening on the bottom side, and a protective member covering the opening on the bottom side and the opposite ends of the bonding wires. The protective member has a height vertically extended from a bottom side thereof to the carrier within 0.4 mm.

REFERENCES:
patent: 6218731 (2001-04-01), Huang et al.

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