IC chip having volatile memory cells simultaneously loaded with

Static information storage and retrieval – Magnetic bubbles – Guide structure

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

395700, 395425, 365 95, 364933, 3649655, 364967, 3649752, 364DIG2, 3642446, 3642455, 364247, 3642802, 364DIG1, G06F 1200

Patent

active

052300587

ABSTRACT:
Initial data and/or control bits of registers within a digital integrated circuit are simultaneously loaded from localized non-volatile memory cells provided as part of the circuit. Such loading is accomplished each time the circuit is initialized, such as when power is first turned on to a system in which the circuit is a part. An important use of this technique is with a computer peripheral circuit chip such as a serial communications controller.

REFERENCES:
patent: 4476522 (1984-10-01), Bushaw et al.
patent: 4646269 (1987-02-01), Wong et al.
patent: 4694431 (1987-09-01), Miyamura et al.
patent: 4751636 (1988-06-01), Sibley

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

IC chip having volatile memory cells simultaneously loaded with does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with IC chip having volatile memory cells simultaneously loaded with , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and IC chip having volatile memory cells simultaneously loaded with will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1767354

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.