IC chip error detecting and correcting method including automati

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371 68, G06F 1110

Patent

active

047232455

ABSTRACT:
A method employing two identical IC chips for providing error detecting and correcting operations on a plurality of input bits comprised of input data bits and input check bits, wherein a single one of the IC chips has an insufficient number of available outputs to provide all of the required outputs. The method includes applying the input data bits and the input check bits to the input terminals of each IC chip in an inverse manner relative to one another, and then performing the error detecting and correcting operations on each chip in accordance with an inversely symmetrical Hamming code. In addition, by taking advantage of redundancies in the performance of error detecting operations, the method also provides for automatic self-checking of chip operations.

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patent: 4426699 (1984-01-01), Tanaka et al.
patent: 4541094 (1985-09-01), Stiffler et al.
patent: 4569051 (1986-02-01), Wilkinson

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