I.sup.2 L heterostructure bipolar transistors and method of maki

Details I.sup.2 L heterostructure bipolar transistors and method of maki I.sup.2 L heterostructure bipolar transistors and method of maki

1985-04-08

1987-02-17

Larkins, William D.

Metal treatment

Stock

Ferrous

357 16, 357 15, 357 44, 357 92, 357 55, 148DIG67, 148DIG72, 148DIG87, 148DIG139, 148DIG50, 148DIG11, H03K 19091, H01L 2704, H01L 2972, H01L 29225

Patent

active

046443819

ABSTRACT:
An integrated injection logic (I.sup.2 L) semiconductor structure is disclosed which may be advantageously implemented in a group III-V compound semiconductor such as gallium arsenide. The base region of the lateral transistor is made extremely thin (less than one-tenth micron) by use of "regrowth" techniques. The structure of the vertical transistor is simplified by using a Schottky collector.

REFERENCES:
patent: 4160988 (1979-07-01), Russell
patent: 4251298 (1981-02-01), Thompson
patent: 4573064 (1986-02-01), McLevige et al.

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