I/O register protection circuit

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395163, 364DIG1, 364247, 3642474, 364228, G06F 1314

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active

053393945

ABSTRACT:
A data processing system is provided that includes a plurality of processors each including a circuit for providing a busy signal. The system also includes a plurality of registers for storing data wherein each register is dedicated to a selected processor or a selected set of processors. A control circuit is provided for receiving the busy signals and prohibiting storage from an external device to the registers dedicated a processor when that processor provides a busy signal.

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