I/O Priority resolver

Details I/O Priority resolver I/O Priority resolver

1979-01-02

1981-06-02

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 918

Patent

active

042714672

ABSTRACT:
Apparatus for resolving the priority of a plurality of input/output devices. The device request signals and signals indicating the channel number of the currently active channel program are applied to the address terminals of a programmable read only memory. Each address location stores bits indicative of the next priority device for the given input conditions.

REFERENCES:
patent: 3599162 (1971-08-01), Byrns
patent: 3925766 (1975-12-01), Bardotti
patent: 3993981 (1976-11-01), Cassarino, Jr.
patent: 4001783 (1977-01-01), Monahan
patent: 4005391 (1977-01-01), Macpherson
patent: 4020471 (1977-04-01), Woods
patent: 4023143 (1977-05-01), Braunstein
patent: 4028684 (1977-06-01), Divine et al.
patent: 4056847 (1977-11-01), Marcantonio

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