I/O port for determining accidents in an external device

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Details

39518207, 3951832, 39518509, 395733, G06K 1100

Patent

active

058706232

ABSTRACT:
A port logical level detection circuit ((81)) detects whether a voltage level of a port (15a) is high or low with respect to a plurality of threshold values. A comparison circuit (82) compares a plurality of detected results with data (S22) held by a port latch (40), and outputs a plurality of comparison results. An accident determination signal generating circuit (83) generates an accident determination signal (S56) from the plurality of comparison results outputted from the comparison circuit (82). Thus, it is possible to determine such an accident that the voltage of the port is at a prescribed logical level of an external circuit (16) or at a level in an indefinite area between prescribed logical levels.

REFERENCES:
patent: 5483635 (1996-01-01), Kameyama
patent: 5534801 (1996-07-01), Wu et al.

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