Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1998-11-02
2001-10-09
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S667000, C257S690000, C257S692000, C257S726000, C257S736000, C257S739000, C257S750000, C257S766000, C257S772000, C257S779000
Reexamination Certificate
active
06300678
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an I/O pin used for electrically connecting printed boards characterized in that one end of the I/O pin is perpendicularly secured onto one printed board, and the other end of the I/O pin is soldered to a predetermined position on the other printed board when the one printed board is mounted on the other printed board.
2. Description of the Related Art
A multichip module, which will be referred to as MCM hereinafter in this specification, composed of a small printed board on which semiconductor elements (bare chips) are mounted is mounted onto a large printed board (mother board) via a large number of I/O pins, the diameter of which is approximately 0.2 mm and the length of which is approximately 3 mm.
FIG. 11
is a view showing a primary portion of an example of the structure in which the small printed board is mounted onto the large printed board.
Referring to the drawing, on the surface of mother board MB, a plurality of disk-shaped pads Pd are formed by means of etching, wherein only one disk-shaped pad Pd is shown in the example shown in the drawing. On the pad Pd, a layer of solder S and a layer of flux (not shown in the drawing) are laminated in this order.
On the other hand, an MCM includes: a ceramic substrate CB on which six layers (three layers in the example shown in the drawing) of polyimide Pi are usually formed, between which wiring layers are interposed; a plurality of bare chips (semiconductor elements) BT (one bare chip is shown in the example shown in the drawing) mounted on the ceramic substrate; and I/O pins
51
a
, the number of which may be several hundred to several thousand (one I/O pin is shown in the example shown in the drawing), by which an MCM and a mother board are connected to each other.
When an MCM is mounted on a mother board MB, I/O pin
51
a
collides with pad Pd, which corresponds to I/O pin
51
a
, and is temporarily attached to mother board MB by a layer of flux. After that, I/O pin
51
a
is soldered (secured) to the corresponding pad Pd by solder S which is melted by a reflow treatment.
When an MCM is mounted on a mother board MB, the following problems may be encountered. Solder S creeps upward along I/O pin
51
a
, that is, solder S flows from a fore end to a base of the I/O pin and extends to the polyimide layers Pi on MCM. At this time, solder S intrudes between the polyimide layers Pi. Therefore, the MCM suffers damage that can not be repaired.
When MCM is heated so that it can be detached from mother board MB, there is caused a problem that solder S flows, that is, solder S creeps upward, and this phenomenon was described before.
Further, when bare chip BT is detached after MCM has been removed, solder S depositing at the fore end of I/O pin flows to the base side of I/O pin, that is, solder S creeps upward, and the same problem may be encountered.
In this connection, techniques disclosed in the patent publications relating to the present application will be briefly introduced as follows.
Japanese Unexamined Patent Publication No. 63-74657 discloses a soldering structure by which IC for driving and a substrate are soldered to each other. In this structure, there is provided a layer (dam) for preventing the diffusion of solder in the periphery of the pad portion of the substrate.
Japanese Unexamined Patent Publication No. 62-165960 discloses a structure of soldering in which a surface mounting J-bend type IC such as PLCC (Plastic Leaded Chip Carrier) and a substrate are soldered to each other. At the base portions of a large number of leads, which are bent into a J-shape, there are formed layers (dams) made of resin for preventing solder from creeping upward.
Japanese Unexamined Patent Publication No. 52-51569 discloses a method of manufacturing a substrate of polyimide. On a copper layer pattern formed on the substrate, a layer (dam) for preventing the diffusion of solder is formed by the photo-resist method.
Japanese Unexamined Patent Publication No. 2-187045 discloses a structure of the pad arranged on the substrate on which IC chips are mounted. In this structure, an oxide film (dam) of low solder wettability is formed in the periphery of the pad by heat treatment.
Japanese Unexamined Patent Publication No. 2-47890 discloses a structure of a circular pad on the substrate with which the pins of electronic parts are made to collide. A small circular layer (dam) made of material, to which no solder adheres, is formed at the center of the pad so that the pin can be aligned.
Japanese Unexamined Patent Publication No. 58-35996 discloses a structure of a substrate having a through-hole into which a pin insertion type IC is inserted. On a surface of the substrate opposite to the side on which IC is mounted, a sublimation type solder-resist (polyurethane) is coated for the prevention of diffusion of solder.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide an I/O pin capable of safely and positively preventing solder from flowing from the fore end to the base of the I/O pin.
In order to accomplish the above object, the present invention provides an I/O pin, for connecting substrates, comprising a solder dam capable of preventing solder from flowing from one end to the other end of the I/O pin in the longitudinal direction, the solder dam being arranged in an intermediate portion of the I/O pin in the longitudinal direction.
It is preferable that one end of the I/O pin is perpendicularly fixed onto a small printed board, and the other end of the I/O pin is soldered to a predetermined position on a large printed board when the small printed board is mounted on the large printed board.
It is preferable that the small printed board is a multichip module on which at least one bare chip is mounted, the large printed board is a mother board and the I/O pin is formed into a rod-shape. Also, it is preferable that the solder dam is composed of a layer made of material of low solder wettability which is arranged on an outer circumference of the intermediate portion of the I/O pin. Also, it is preferable that the layer of low solder wettability is a layer on which Ni is plated. Also, it is preferable that the solder dam is composed of a layer made of a highly heat-resistant resin arranged on an outer circumference of the intermediate portion of the I/O pin. Also, it is preferable that the solder dam is composed of a layer of high temperature arranged on an outer circumference of the intermediate portion of the I/O pin. It is preferable that the I/O pin further comprises: an electrically conductive body; a first covering layer made of material of low solder wettability arranged on an outer circumference of the body; and a second covering layer made of material of high solder wettability arranged on an outer circumference of the first covering layer, wherein a portion of the first covering layer exposed when the second covering layer in the intermediate portion of the I/O pin is removed composes the solder dam. It is preferable that the I/O pin further comprises: an electrically conductive body; a first covering layer made of material of low solder wettability arranged on an outer circumference of the body; and a second covering layer made of material of high solder wettability arranged on an outer circumference of the first covering layer, wherein the second covering layer is not formed in an intermediate portion of the I/O pin in the process of formation of the second covering layer, and a portion of the first exposed covering layer forms a solder dam.
According to the present invention, even if solder creeps upward when an I/O pin is soldered at a predetermined position on the large printed board in the case of mounting the small printed board on the large printed board, solder can be positively prevented from flowing by the action of the solder dam formed in the intermediate portion of I/O pin.
According to the present invention, there is provided a printed board comprising at least one I/O pin used for electrically connectin
Kikuchi Shunichi
Osawa Satoshi
Suehiro Mitsuo
Armstrong Westerman Hattori McLeland & Naughton LLP
Fujitsu Limited
Lee Eddie
Warren Matthew E.
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