Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2005-02-22
2005-02-22
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S333000, C326S081000, C326S083000, C326S086000
Reexamination Certificate
active
06859074
ABSTRACT:
An apparatus for providing bias voltages for input/output (I/O) connections on low voltage integrated circuits. In one embodiment, the invention comprises an I/O pad, a pull-down transistor device that has a protective transistor coupled to said I/O pad, and a pull-up transistor device that has a second protective transistor, coupled to said I/O pad. A first switch coupled to the first protective transistor is responsive to a first supply voltage, a second supply voltage, and a reference voltage. Likewise, a second switch coupled to the second protective transistor is responsive to the first supply voltage and the reference voltage. A first self-bias circuit is also coupled to the first switch, wherein said the self-bias circuit uses a voltage at said I/O pad to bias the first protective transistor when both of the first and second supply voltages are powered off. Likewise, a second self-bias circuit coupled to the second switch, wherein the second self-bias circuit also uses the voltage at the I/O pad and an output of the first self bias circuit, to bias the second protective transistor when the first supply voltage is powered off.
REFERENCES:
patent: 4473758 (1984-09-01), Huntington
patent: 4556804 (1985-12-01), Dewitt
patent: 5170078 (1992-12-01), Hsueh et al.
patent: 5184031 (1993-02-01), Hayakawa et al.
patent: 5208488 (1993-05-01), Takiba et al.
patent: 5350951 (1994-09-01), Adachi
patent: 5444272 (1995-08-01), Ajit
patent: 5474946 (1995-12-01), Ajit et al.
patent: 5483087 (1996-01-01), Ajit
patent: 5498884 (1996-03-01), Ajit
patent: 5506535 (1996-04-01), Ratner
patent: 5528447 (1996-06-01), McManus et al.
patent: 5557127 (1996-09-01), Ajit et al.
patent: 5581100 (1996-12-01), Ajit
patent: 5623151 (1997-04-01), Ajit
patent: 5629535 (1997-05-01), Ajit
patent: 5646809 (1997-07-01), Motley et al.
patent: 5654858 (1997-08-01), Martin et al.
patent: 5719411 (1998-02-01), Ajit
patent: 5757033 (1998-05-01), Ajit
patent: 5757034 (1998-05-01), Ajit
patent: 5783474 (1998-07-01), Ajit
patent: 5793066 (1998-08-01), Ajit
patent: 5852375 (1998-12-01), Byrne et al.
patent: 5877515 (1999-03-01), Ajit
patent: 5909142 (1999-06-01), Kawasaki et al.
patent: 5910664 (1999-06-01), Ajit
patent: 5914626 (1999-06-01), Kim et al.
patent: 6005413 (1999-12-01), Schmitt
patent: 6018257 (2000-01-01), Hung et al.
patent: 6031394 (2000-02-01), Cranford, Jr. et al.
patent: 6054888 (2000-04-01), Maley
patent: 6072351 (2000-06-01), Sharpe-Geisler
patent: 6081132 (2000-06-01), Isabara
patent: 6081412 (2000-06-01), Duncan et al.
patent: 6130556 (2000-10-01), Schmitt et al.
patent: 6140846 (2000-10-01), Chan et al.
patent: 6147846 (2000-11-01), Borg
patent: 6160428 (2000-12-01), Pasqualini
patent: 6194944 (2001-02-01), Wert
patent: 6236236 (2001-05-01), Chen
patent: 6351157 (2002-02-01), Sharpe-Geisler
patent: 6392439 (2002-05-01), Tanaka et al.
patent: 6429716 (2002-08-01), Drapkin et al.
patent: 6583644 (2003-06-01), Shin
patent: 6628149 (2003-09-01), Ajit
patent: 6729716 (2004-05-01), Eguchi et al.
patent: 19521751 (1996-02-01), None
patent: 19523172 (1996-02-01), None
patent: 19526537 (1996-02-01), None
patent: 19530109 (1996-04-01), None
patent: 19547756 (1996-08-01), None
patent: 19641839 (1997-05-01), None
patent: 19638381 (1997-06-01), None
patent: 2722335 (1996-01-01), None
patent: 2723259 (1996-02-01), None
patent: 2723260 (1996-02-01), None
patent: 2725308 (1996-04-01), None
patent: 2730859 (1996-08-01), None
patent: 2739224 (1997-03-01), None
patent: 2740907 (1997-05-01), None
patent: 2290659 (1996-01-01), None
patent: 2306250 (1997-04-01), None
patent: 8-051197 (1996-02-01), None
patent: 8-083897 (1996-03-01), None
patent: 8-107204 (1996-04-01), None
patent: 8-172181 (1996-07-01), None
patent: 8-250512 (1996-09-01), None
patent: 9-116134 (1997-05-01), None
patent: 9-172159 (1997-06-01), None
patent: WO 9820562 (1998-05-01), None
patent: WO 0038322 (2000-06-01), None
International Search Report dated Apr. 13, 2003 PCT/US02/38489.
Deng-Yuan Chen, “Design of a Mixed 3.3 V and 5V PCI I/O Buffer,” 2ndInternational Conference on ASIC Proceeding, PP 336 339, (Oct. 21-24, 1996).
Broadcom Corporation
Lam Tuan T.
Sterne Kessler Goldstein & Fox P.L.L.C.
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