I/O buffering system to a programmable switching apparatus

Details I/O buffering system to a programmable switching apparatus I/O buffering system to a programmable switching apparatus

1992-07-06

1994-01-25

Evans, Arthur G.

395250, G06F 1300

Patent

active

052822710

ABSTRACT:
A field programmable interconnect device (FPID) flexibly interconnects a set of electronic components such as integrated circuits and other devices to one another. The FPID is an integrated circuit chip including a set of ports and a cross-point switch that can be programmed to logically connect any one port to any other port. Each FPID buffer port may be programmed to operate in various modes including unidirectional and bi-directional, with or without tristate control, and to operate at various input or output logic levels with adjustable pull up currents. Each FPID buffer port may also be programmed to perform various operations on buffered signals including adjustably delaying the signal, inverting it or forcing it high or low. The FPID is linked to a host computer via a bus that permits the host computer to program the FPID to make the desired connections, to select various modes of operation of buffers within the FPID and to read out data stored in the FPID. Each port of an FPID also samples and stores data indicating states of the signal passing through it over the last several system clock cycles. The FPID can subsequently read out the stored data to the host computer.

REFERENCES:
patent: 4462084 (1984-07-01), Greenwood
patent: 4910704 (1990-03-01), Gemma
patent: 5015884 (1991-05-01), Agrawal et al.
patent: 5113368 (1992-05-01), Le Calvez et al.

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