I/O buffer with low voltage semiconductor devices

Details I/O buffer with low voltage semiconductor devices I/O buffer with low voltage semiconductor devices

2011-05-03

2011-05-03

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C327S108000, C327S379000, C327S391000

Reexamination Certificate

active

07936209

ABSTRACT:
Described embodiments provide for protecting from DC and transient over-voltage conditions an input/output (“I/O”) buffer having first and second I/O transistors. The first I/O transistor is coupled to a first over-voltage protection circuit adapted to prevent an over-voltage condition on at least the first I/O transistor. The second I/O transistor is coupled to a second over-voltage protection circuit adapted to prevent an over-voltage condition on at least the second I/O transistor. First and second bias voltages are generated from an operating voltage of the buffer. A third bias voltage is generated from either i) the first bias voltage, or ii) an output signal voltage of the buffer and a fourth bias voltage is generated from either i) the second bias voltage, or ii) the output signal voltage of the buffer. The third and fourth bias voltages are provided to the first and second over-voltage protection circuits, respectively.

REFERENCES:
patent: 5973534 (1999-10-01), Singh
patent: 6054888 (2000-04-01), Maley
patent: 6693469 (2004-02-01), Prodanov
patent: 7268588 (2007-09-01), Sanchez et al.

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