Hysteresis-insensitive single-comparator successive approximatio

Details Hysteresis-insensitive single-comparator successive approximatio Hysteresis-insensitive single-comparator successive approximatio

1992-03-05

1993-08-10

Williams, Howard L.

Coded data generation or conversion

Converter compensation

341172, H03M 106, H03M 136

Patent

active

052353338

ABSTRACT:
A circuit for preventing analog-to-digital conversion errors due to MOS threshold shifts produced in a comparator during successive approximation testing of MSB and LSB groups of binarily weighted bit capacitors includes a first amplifier that amplifies voltage changes produced on a charge distribution conductor connected to the bit capacitors during successive approximation testing of the bit capacitors of the MSB group. The output of the first amplifier subjects a MOSFET in an input stage of the comparator to sufficiently large gate-to-source voltages to produce an MOS threshold shift in the MOSFET. During successive approximation testing of bit capacitors of the LSB group, a second amplifier amplifies signals representative of voltage changes produced on the charge distribution conductor and applies the amplified signals to the same MOSFET. The second amplifier has a sufficiently large gain that the earlier induced MOS threshold shift, when referred back to an input of the amplifier by dividing the MOS threshold shift by the gain, is small enough compared to the voltage changes produced on the charge distribution conductor during the successive approximation testing of the bit capacitors of the LSB group to avoid conversion errors.

REFERENCES:
patent: 4138666 (1979-02-01), Eichelburger et al.
patent: 4348658 (1982-09-01), Corter
patent: 4620179 (1986-10-01), Cooper et al.
patent: 4940981 (1990-07-01), Naylor et al.
patent: 4947169 (1990-08-01), Smith et al.
patent: 4975700 (1990-12-01), Tan et al.
patent: 5006853 (1991-04-01), Kiriaki et al.

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