Multiplex communications – Wide area network – Packet switching
Patent
1993-11-01
1994-11-22
Bowler, Alyssa H.
Multiplex communications
Wide area network
Packet switching
395800, 370 601, 370 851, 370 857, 3642222, 3642419, 36424294, 364DIG1, G06F 1300, G06F 13374
Patent
active
053676360
ABSTRACT:
A parallel processor network comprised of a plurality of nodes, each node including a processor containing a number of I/O ports, and a local memory. Each processor in the network is assigned a unique processor ID (202) such that the processor IDs of two processors connected to each other through port number n, vary only in the nth bit. Input message decoding means (200) and compare logic and message routing logic (204) create a message path through the processor in response to the decoding of an address message packet and remove the message path in response to the decoding of an end of transmission (EOT) Packet. Each address message packet includes a Forward bit used to send a message to a remote destination either within the network or to a foreign network. Each address packet includes Node Address bits that contain the processor ID of the destination node, it the destination node is in the local network. If the destination node is in a foreign network space, the destination node must be directly connected to a node in the local network space. In this case, the Node Address bits contain the processor ID of the local node connected to the destination node. Path creation means in said processor node compares the masked node address with its own processor ID and sends the address packet out the port number corresponding to the bit position of the first difference between the masked node address and its own processor ID, starting at bit n+1, where n is the number of the port on which the message was received.
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Colley Stephen R.
Kenoyer Stanley P.
Wilde Doran K.
Bowler Alyssa H.
Lamb Owen L.
nCUBE Corporation
Shah Alpesh M.
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