Hyper-ring-on-chip (HyRoC) architecture

Details Hyper-ring-on-chip (HyRoC) architecture Hyper-ring-on-chip (HyRoC) architecture

2011-06-21

2011-06-21

Ryman, Daniel J (Department: 2466)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S535000

Reexamination Certificate

active

07965725

ABSTRACT:
A network-on-chip interconnects an array of integrated circuit resources. The network-on-chip includes at least one vertical communications ring per column of the array and at least one horizontal communications ring per row of the array. A network interface is associated with each resource of the array and operates to interface the communications rings with each other and the resource with the communications rings. A ring hop is provided at each network interface and for each communications ring thereat. Each ring hop functions as an add/drop multiplexer with respect to inserting packets onto the associated communications ring and extracting packets from the associated communications ring. Packets are communicated over the vertical/horizontal rings using a logical transport channel that flows in a cyclic manner through the communications ring without interruption. A back pressure mechanism allows the ring hops on a given communications ring to address overflow conditions on that ring, and a request mechanism allows the ring hops on a given communications ring to request use of that ring to carry a packet communication.

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