Hybrid unlatching flip-flop logic element

Details Hybrid unlatching flip-flop logic element Hybrid unlatching flip-flop logic element

1981-02-06

1983-02-08

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307306, 307476, 365162, H03K 338

Patent

active

043731384

ABSTRACT:
Described is a DC powered flip-flop logic or memory element (i.e., circuit) which comprises two Josephson junction gates J.sub.1 and J.sub.2 which operate individually in the latching mode. In one logic state, the gate J.sub.1 is at V.sub.1 =O while J.sub.2 is at V.sub.2 .noteq.O. In the other logic state, the roles of the two junctions are reversed. The two junctions are interconnected by a passive network such that the switching of J.sub.2, say, from V.sub.2 =O to V.sub.2 .noteq.O induces a current-voltage transient on J.sub.1 which returns it to V.sub.1 =O, and conversely.

REFERENCES:
patent: 3943383 (1976-03-01), Hamel
patent: 3953749 (1976-04-01), Baechtold et al.
patent: 4051393 (1977-09-01), Fulton
Baechtold et al., Two-Junction Josephson Tunneling Device Flip-Flop Shift Register, IBM Technical Disclosure Bulletin, vol. 17, No. 10, pp. 3087-3088, Mar. 1975.
Hamel, Josephson Device Level Converter, IBM Technical Disclosure Bulletin, vol. 15, No. 11, pp. 3561-3562, Apr. 1973.

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