Hybrid switching mode liquid crystal display device and...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Details

C349S043000, C349S110000, C349S139000, C349S141000

Reexamination Certificate

active

06509939

ABSTRACT:

This application claims the benefit of Korean Patent Application No. 1998-27249, filed on Jul. 7, 1998, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a liquid crystal display device and, more particularly, to a hybrid switching mode liquid crystal display device having a high aperture ratio and a method of manufacturing thereof.
2. Discussion of Related Art
Since twisted nematic liquid crystal display devices (TN LCDs) have a high image quality and a low electric power consumption, they are widely applied to flat panel display device. TN LCDs, however, have a narrow viewing angle due to refractive anisotropic of liquid crystal molecules. This is caused by horizontally aligned liquid crystal molecules before voltage is applied are nearly vertically aligned with respect to a substrate when voltage is applied to a liquid crystal panel.
Recently, in-plane switching mode liquid crystal display devices (IPS-LCDs) are widely studied in which viewing angle characteristic is improved and these liquid crystal molecules are nearly horizontally aligned.
FIG. 1A
is a plan view of a unit pixel of a conventional in-plane switching mode active matrix LCD.
FIG. 1B
is a sectional view according to line I-I′ of FIG.
1
A.
Referring to the drawings, an unit pixel region is defined by a gate bus line
1
and a data bus line
2
in which the lines are arranged perpendicularly and/or horizontally as a matrix shape on a first substrate
10
. A common line
16
is arranged parallel to the gate bus line
1
in the pixel region and the thin film transistor (TFT) is formed on a cross of the data bus line
2
and the gate bus line
1
. The TFT includes a gate electrode
3
, a gate insulator
19
, a semiconductor layer
12
, an ohmic contact layer
13
, and source/drain electrodes
4
a
,
4
b
in which the gate electrode
3
is connected to the gate bus line
1
, and source/drain electrodes
4
a
,
4
b
are connected to the data bus line
2
, and the gate insulator
19
is formed on the entire surface of the first substrate
10
.
A common electrode
7
and a data electrode
8
are formed in the pixel region. The common electrode
7
is formed with the gate electrode
3
and connected to the common line
16
, and the data electrode
8
is formed with the source/drain electrodes
4
a
,
4
b
and electrically connected to them. Further, a passivation layer
22
and a first alignment layer (not illustrated) are deposited on the entire surface of the first substrate
10
.
On a second substrate
11
, a black matrix
15
is formed to prevent a light leakage which may be generated around a TFT, the gate bus line
1
, and the data bus line
2
. A color filter layer
25
, and a second alignment layer (not illustrated) is formed on the black matrix
15
in sequence. Also, a liquid crystal layer
30
is formed between the first and second substrates
10
,
11
.
When voltage is not applied to LCD having the above structure, liquid crystal molecules in the liquid crystal layer
30
are aligned according to alignment directions of the first and second alignment layers, but when voltage is applied between the common electrode
7
and the data electrode
8
, the liquid crystal molecules are aligned parallel to extending directions of the common and data electrode. As the foregoing, since liquid crystal molecules in the liquid crystal layer
30
are switched on the same plane at all times, grey inversion is not created in the viewing angle directions of up and down, and right and left directions.
FIG. 2A
is a plan view of the part forming the storage capacitor line of the conventional LCD.
FIG. 2B
is a sectional view according to line II-II′ of FIG.
2
A.
Referring to the drawings, the gate insulator
19
and the semiconductor layer
12
are deposited on the gate electrode
3
and a storage capacitor line
5
. The data bus line
2
is coupled to the storage capacitor line
5
through a hole
18
of the gate insulator
19
and formed with the source/drain electrodes
4
a
,
4
b
of
FIG. 1A. A
method for manufacturing the LCD having above structure is described in FIG.
3
.
A TFT region describes a sectional region according to line I-I′ of
FIG. 1A
, and a storage region describes a sectional region according to line II-II′ of FIG.
2
A.
As shown in the drawing, a method of manufacturing the conventional LCD comprises the steps of patterning the gate electrode
8
, the common electrode
7
, and the storage capacitor line
5
(S
1
), patterning the semiconductor layer
12
and the ohmic contact layer
13
after forming the gate insulator
19
, the semiconductor layer
12
, and the ohmic contact layer
13
on the gate electrode
3
(S
2
), forming the hole
18
by opening some part of the gate insulator
19
in the part forming the storage capacitor line
5
(S
3
), patterning the source/drain electrodes
4
a
,
4
b
, the data electrode
8
, and the data bus line
2
on the ohmic contact layer
13
and the gate insulator
19
(S
4
), forming the passivation layer
22
after n
+
dry etching (S
5
).
However, in the conventional LCD, it is necessary that each of the storage capacitor lines and pad open regions are formed respectively, and the storage capacitor lines are coupled to each other by the data bus line when the gate insulator is patterned to form the storage capacitor line.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a hybrid switching mode LCD having a high opening ratio due to transparent connecting parts for connecting to an outer driving circuit by etching a passivation layer/pad at the same time thereby forming a storage capacitor line, and a method of manufacturing thereof.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve the above object, a hybrid switching mode LCD according to the present invention comprises first and second substrates, transparent data bus lines and gate bus lines defining a pixel region on the first substrate in which the lines are arranged perpendicularly and/or horizontally as a matrix shape, especially the transparent data bus lines made of, for example, ITO (indium tin oxide) has holes, common lines formed parallel to the gate bus lines in the pixel region, TFTs on the cross of the data bus lines and the gate bus lines in the pixel region, common electrodes and storage capacitor lines in pixel region, a gate insulator having holes on the gate bus lines, the common electrodes, and the storage capacitor lines, a passivation layer having holes on the gate insulator, a first alignment layer with a fixed alignment direction on the passivation layer, at least one counter electrode on the second substrate thereby applying vertical and inclined electric fields with the common and data electrodes on the first substrate, black matrixes on the counter electrodes to prevent a light leakage which may be generated around TFTs, the gate bus lines, and the data bus lines, a color filter layer on the black matrix and the second substrate, a second alignment layer on the color filter layer, and a liquid crystal layer between the first and second substrates.
A method of manufacturing the above LCD comprises the steps of forming the gate bus lines, the gate electrodes, the common lines, and the storage capacitor lines, depositing an inorganic material, an amorphous silicon, and an impurity amorphous silicon, forming source/drain electrodes and the data electrodes by patterning a metal, forming the gate insulator and the semiconductor layers having holes by etching the inorganic material and amorphous silicon with masks of source/drain electrodes and the metal, forming an ohmic contact layer by etchin

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