Amplifiers – With semiconductor amplifying device – Including distributed parameter-type coupling
Reexamination Certificate
2002-08-02
2003-09-02
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including distributed parameter-type coupling
C330S307000
Reexamination Certificate
active
06614307
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to power amplifiers and more specifically to hybrid structures for distributed power amplifiers.
BACKGROUND OF THE INVENTION
Low voltage power amplifiers are used in a variety of applications including radio and cellular handsets as well as wireless broadband applications to name a few. The term hybrid structure typically refers to passive circuit elements formed on non-semiconductor substrates combined with semiconductors. Hybrid structures are often used in the design of low voltage distributed power amplifier (PA) circuits because of the low cost properties of the structure.
FIG. 1
shows a schematic
100
of a distributed power amplifier
102
integrated as a single chip coupled to balun/transformer
104
on a ceramic substrate
106
. The substrate
106
is typically formed using Low Temperature Cofired Ceramics Technology (LTCC). The distributed power amplifier
102
includes an input
108
, a plurality of transistors
110
, here shown as field effect transistors (FETs) each having drain
112
, gate
114
and source
116
, and an output
118
. Amplifier
102
further includes gate transmission line
120
having gateline inductors
121
as well as drain transmission line
122
having drainline inductors
123
, along with drainline capacitors
124
, and termination resistors
126
,
128
.
Traditionally, the distributed power amplifier
102
has been built with both the gate transmission line
120
and the drain transmission line
122
integrated on the power amplifier IC chip
102
. The connection to the rest of the circuit is accomplished with wirebonds
130
at the output
118
of the power amplifier chip
102
. For a low voltage power amplifier, the output
118
of the PA
102
is a low impedance point (3 to 4 ohm). Thus, the wirebond inductance significantly degrades the performance of the amplifier
102
since the inductive reactance of the wirebonds
130
is a large percentage of the total load impedance.
FIG. 2
shows a graph
200
of gain (dB)
202
, output power (Pout, dBm)
204
and power-added efficiency (PAE%)
206
versus frequency (GHz). Graph
200
is based on a simulation for a five-cell PHEMT (Pseudomorphic High Electron Mobility) transistor, drain-tapered, distributed amplifier with 1 watt output power with the wirebonds
130
connecting the IC
102
and the LTCC substrate
106
as shown in FIG.
1
. Power amplifier efficiency is a design parameter of considerable interest, and circuit designers are constantly seeking ways of improving the efficiency which in turn translates into longer battery life for portable products.
Accordingly, it would be desirable to have a power amplifier structure that is less susceptible to the wirebonds so as to have less impact on impedance and thereby provide improved efficiency.
REFERENCES:
patent: 3495183 (1970-02-01), Doundoulakis et al.
patent: 4446445 (1984-05-01), Apel
patent: 4540954 (1985-09-01), Apel
patent: 5117207 (1992-05-01), Powell et al.
Pavio Anthony M.
Zhao Lei
Choe Henry
Doutre Barbara R.
Gilmore Douglas W.
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