Hybrid state machine for frame synchronization

Details Hybrid state machine for frame synchronization Hybrid state machine for frame synchronization

2000-01-10

2004-05-25

Sam, Phirin (Department: 2661)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C375S134000, C375S137000

Reexamination Certificate

active

06741613

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to binary data transmissions generally and, more particularly, to a hybrid state machine for frame synchronization in digital transmissions.
BACKGROUND OF THE INVENTION
Data may be serially transmitted one bit at a time along it, a data transmission path. The serial data can be transmitted in groups of bits called frames. The frames are delimited by synchronization codes that identify the beginning or the end of each frame. The synchronization codes must be identified in the data stream before the significance of the data contained in the frame can be determined. When a synchronization code is identified, a signal can be generated to synchronize a data recovery circuit to the contents of the frame. The synchronization of the data recovery circuit to the frame is frame synchronization.
The process of frame synchronization can be divided into an acquisition phase and a tracking phase. Each of the phases can be managed by a synchronization state machine. In the acquisition phase, the synchronization state machine moves to a next state each time a “hit” occurs (e.g., a synchronization code is identified). If a “no-hit” occurs (e.g., a synchronization code is expected but not identified), the synchronization state machine moves to a previous acquisition state if one exists. When a predetermined number of “hits” occur in a row, the data signal is considered acquired. The synchronization state machine can generate a signal indicating that the synchronization of the data signal is acquired.
With the synchronization of the data signal acquired, the frame synchronization process switches to the tracking phase. In the tracking phase, the synchronization state machine moves to a next tracking state each time a “no-hit” occurs. If a “hit” occurs, the synchronization state machine moves to a previous tracking state, if one exists. When a predetermined number of “no-hits” occur in a row, tracking of the data signal is considered lost. With the tracking of the data signal lost, the frame synchronization process switches back to the acquisition phase. The synchronization state machine can generate a signal indicating that lock has been lost.
Conventional synchronization state machines used for frame synchronization usually have identical topologies for the acquisition phase and the tracking phase. The topology of a synchronization state machine defines the connections between synchronization states. Since the topologies of both phases are identical, conventional synchronization state machines for frame synchronization have either long acquisition and tracking times or short acquisition and tracking times. A synchronization state machine with the smallest mean acquisition time (MAT) is said to have an optimistic acquisition stage. Conversely, a synchronization state machine with the longest MAT is said to have a pessimistic acquisition stage. A similar characterization can be made with respect to the tracking stage. Using the mean time to loose lock (MTLL) as a parameter, a synchronization state machine with the smallest MTLL is said to have a pessimistic tracking stage. A synchronization state machine with the longest MTLL is said to have an optimistic tracking stage.
Referring to
FIG. 1
, a state diagram illustrating a conventional synchronization state machine (SSM)
10
is shown. The synchronization state machine
10
has an acquisition stage
12
and a tracking stage
14
. The acquisition stage
12
has three states
16
,
18
and
20
. When a “hit” occurs, the acquisition stages moves forward one state (e.g., the arrows marked P
A
). When a “no-hit” occurs, the acquisition stage moves back to the first acquisition state
16
(e.g., the arrows marked Q
A
)). Each time a “no-hit” occurs, the acquisition process must start over. In order for the synchronization state machine
10
to consider the synchronization acquired, 3 “hits” must occur in a row (or a number equal to the number of states in the acquisition stage). The mean acquisition time of the acquisition stage
12
is the longest for a given number of states. The tracking stage
14
uses the same topology as the acquisition stage. When a “hit” occurs during tracking, the tracking phase moves backward to the first tracking state (e.g., the arrows marked P
T
). When a “no-hit” occurs during tracking, the tracking stage moves forward one state (e.g., the arrows marked Q
T
) Since a single “hit” will start the tracking sequence over, the tracking phase
14
has the longest mean time to lose lock for a given number of states. The synchronization state machine
10
has a pessimistic acquisition stage and an optimistic tracking stage.
Referring to
FIG. 2
, a state diagram illustrating a another conventional synchronization state machine
22
is shown. The synchronization state machine
22
has an acquisition stage
24
and a tracking stage
26
. The acquisition stage
24
has three states
28
,
30
and
32
. When a “hit” occurs, the acquisition stage moves forward one state (e.g., the arrows marked P
A
). When a “no-hit” occurs, the acquisition stage moves backward one state (e.g., the arrows marked Q
A
) Since a “no-hit” only moves the acquisition stage
24
back one state, the acquisition stage
24
will have the shortest mean acquisition time for a given number of states.
The tracking stage
26
uses the same topology as the acquisition stage. When a “hit” occurs during tracking the tracking stage
26
moves backward one state. When a “no-hit” occurs, the tracking phase moves forward one state. Like the acquisition stage, the tracking stage will have the shortest mean time to lose lock. The synchronization state machine
22
has an optimistic acquisition stage and a pessimistic tracking stage.
Ever increasing data transmission rates require that data recovery circuits quickly acquire a lock on the data transmissions and track the transmissions without losing the lock for as long as possible. The synchronization state machine
10
and the synchronization state machine
22
cannot meet these requirements. While the synchronization state machine
10
can track a transmission for the longest period, the synchronization state machine
10
also requires the longest time to acquire a lock on the transmission. Conversely, the synchronization state machine
22
can acquire a lock on a transmission in the shortest time. However, the synchronization state machine
22
also loses the lock in the shortest time. A synchronization state machine is needed that can provide a short mean acquisition time and a long mean time to lose lock.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a first stage and a second stage. The first stage may have a first plurality of states connected by a first topology. The second stage may have a second plurality of states connected by a second topology. The second topology may be different for the first topology.
The objects, features and advantages of the present invention include providing a hybrid state machine for frame synchronization that may (i) have two different topologies to define connections between synchronization states, (ii) use one topology to minimize means acquisition time and a second topology to maximize mean time to lose lock, and/or (iii) provide added flexibility in trading-off time to recover from a false lock and tracking time.


REFERENCES:
patent: 5710783 (1998-01-01), Luthi et al.
patent: 5835165 (1998-11-01), Keate et al.

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