Hybrid semiconductor imaging device having plural readout...

Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit

Reexamination Certificate

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C250S2140RC

Reexamination Certificate

active

06323475

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to hybrid imaging devices, for example for high energy radiation imaging, for example radiation having energies in excess of 1 keV, such as X-rays.
BACKGROUND OF THE INVENTION
Traditional arrangements for X-ray imaging, including cassette film, other modalities such as wire chambers, scintillating crystals or screens, (e.g. Sodium Iodide NaI), BGO (Bismuth Germanium Oxide) and CR plates (Computed Radiography), have been utilized over the past forty years.
More recently, semiconductor imaging devices have been employed, including CCD-based devices, both in stand-alone implementations and coupled to scintillating screens, silicon microstrip detectors and semiconductor pixel detectors.
Semiconductor pixel detectors, such as have been described in the Applicants's International patent application WO95/33332, based on ASIC (Application Specific Integrated Circuit) CMOS processing, can provide high spatial resolution, direct detection, compactness, high absorption efficiency and real-time imaging. However, limitations (e.g. yield) of ASIC CMOS technology based on, for example, crystalline or polycrystalline semiconductor technology, limit the maximal size of monolithic detectors to a few square centimeters. Various methods of combining individual monolithic detectors have been, therefore, proposed. The major challenge is the formation of continuous imaging areas larger than that possible with a single hybrid imaging device without any blind regions.
One method of eliminating such inactive regions in the final image has been the use of software interpolation. However, this method does not recover lost information but only provides an approximation.
Other methods for combining monolithic detectors in large imaging areas without the presence of inactive regions have been proposed.
In the Applicant's International patent application WO 95/33332 mentioned above, a tiling approach is proposed where individual detectors are staggered on a mosaic in such a manner that one third of the total desired area is imaged in a single exposure. Three different exposures, at different positions of the mosaic, are required. The approach is cost efficient as it reduces the total number of required detectors and allows for replacement of defective detectors. Nevertheless, this solution requires a moving device, translating the imaging area in two subsequent positions. A total of three snapshots are taken in order to provide substantially continuous coverage.
The Applicant's UK patent application GB-A-2,305,096 describes an approach to the mounting of imaging devices on a support plane, in which imaging devices are secured to a mount to form an imaging device tile, and then the tile is removably mounted on a support plane by means of screws, vacuum, or other fastening arrangements permitting non-destructive removable mounting of the imaging device tiles. However, this application does not address the problems of avoiding edge effects between imaging devices.
In European patent application EP-A-0,421,869, an approach to the joining of individual image detectors is described. The detectors are glued to a stepped support with a detector on a step extending beyond the edge of the step to partially overly a detector on the next lower step. Although this approach allows for large area continuous imaging, it provides a rigid device whose thickness increases with imaging area. Furthermore, as individual detectors are rigidly glued on the apparatus defective component replacement is not addressed.
Another approach to large area imaging is described in European patent application EP-A-0,577,487. The approach provides an imaging apparatus comprising several individual detector substrates arranged adjacent to each other and rigidly connected to each other by means of support substrates which overlap adjacent detector substrates. The detector substrates are rigidly connected to the support substrates by means of indium bumps. Although the total thickness of the apparatus is independent of the imaging area, the overall structure is, once again rigid. Also, the constructions proposed in EP-A-0,577,487 are likely to suffer from edge effects or inactive regions along the boundaries between two detectors.
Thus, several proposals provide large area continuous coverage without use of mechanical motion and without use of software interpolation. Such solutions find application in dental imaging, real time imaging, conventional radiography (e.g. chest X-rays) as well as in the field of industrial X-ray imaging and non-destructive testing.
Although existing proposals are intended for constructing large imaging areas, there exist applications requiring imaging areas around 30 cm
2
less. For example, in intraoral imaging, the desired area is around 10 cm
2
and the overall imaging device thickness is highly constrained, preferably under 5 mm or, even better, under 3 mm.
The present invention seeks to provide a solution to the provision of a hybrid semiconductor imaging array providing an area larger than that possible with prior hybrid imaging devices using CMOS based readout chips without the bulk and complexity and/or requirements for movement or interpolation of the prior art.
Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. Features from dependent claims may be combined with those of the independent claims in any appropriate manner and not merely in the specific combinations enumerated in the claims.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, there is provided a hybrid semiconductor imaging device comprising:
a detector substrate, which detector substrate has a bias contact on a first surface and a plurality of detector cell contacts on a second surface; and
a plurality of readout substrates comprising a plurality of readout circuits and a corresponding plurality of readout circuit contacts, said plurality of readout substrates being connected to said detector substrate with said readout circuit contacts electrically connected to respective detector cell contacts,
wherein at least one readout circuit contact is offset with respect to a said respective detector cell contact.
Accordingly, an embodiment of the invention provides an approach to forming an imaging array different from that of the prior art. All prior art approaches are based on methods for joining smaller monolithic detectors into large area mosaics with a plurality of detecting substrates and a plurality of CMOS readout layers. Typically the number of detector substrates and the number of readout substrates are substantially equal. In contradistinction thereto, in an embodiment of the invention, an imaging device comprises one detector substrate with a plurality of readout chips connected thereto. No direct contact, either electrical or mechanical, between the readout substrates is needed. The readout substrates are mechanically and electrically connected to the single detector substrate.
By arranging that readout circuit(s) on the readout substrate do not need to be aligned directly with the corresponding detector cells, but can be out of register (i.e. offset) with respect thereto, areas of the detector substrate located in a region between readout substrates or over a non-active region of the readout substrates, which would otherwise be inactive or give very poor resolution, can be made active with good resolution. Thus a continuous detecting plane with good resolution can be achieved.
An embodiment of the invention can provide an imaging device providing continuous imaging while constraining the detector thickness to a minimum. Also, a relatively large area imaging device can be produced without the readout substrate needing to be so large that manufacturing yield decreases.
In a preferred embodiment, the plurality of readout substrates are bump-bonded to the readout detector substrate.
Conductive tracks enable a readout circuit contact to be connected to a detector cell contact offset with respect there

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