Hybrid sample data filter

Registers – Transfer mechanism – Traveling pawl

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325 38B, 332 11D, 333 18, 333 28R, 333 70T, H03H 710, H03K 1322, G06F 738

Patent

active

039639118

ABSTRACT:
A sample data filter using a delta modulator to feed a shift register of which selected outputs are pulsewidth weighted. Each of the coefficient multipliers include a flip-flop fed by one of the taps of the shift register and triggered by a clock. A synchronous counter, common to each of the multipliers, is fed to a NAND gate that clears the flip-flop. Interposed between the counter and the NAND gate are a series of switches, one for each stage of the counter. The flip-flop controls a switch to a source of reference voltage and the output of this switch controlled voltage from each of the multipliers is summed and fed to a demodulator.

REFERENCES:
patent: 3633170 (1972-01-01), Jones
patent: 3814917 (1974-06-01), Nussbaumer
patent: 3906400 (1975-09-01), Gooding et al.
Lockhart, G. B. Digital Encoding and Filtering Using Delta Modulation, In the Radio & Elect. Eng., 42(12): pp. 547-551, Dec., 1972.
Peled, A. et al., A New Approach to the Realization of Nonrecursive Digital Filters, In IEEE Trans. Aud. & Elect. AC., Au21(6): pp. 477-484, Dec., 1973.

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