Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-03-29
2002-05-14
Fabaany, Jr., Wael (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S106000, C438S123000, C257S678000, C257S690000
Reexamination Certificate
active
06387730
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to hybrid semiconductor devices, and particularly to the automatic fabrication of semiconductor devices containing multiple, interconnected semiconductor chips.
While not limited thereto, the invention has particular utility in the fabrication of two phase (full wave) bridge rectifiers including four interconnected semiconductor rectifier chips and four terminals for connecting the bridge rectifiers into an electrical circuit. Such bridge rectifiers are used in large quantities, and highly automated processes have been developed for their manufacture.
In one process, for example, described in U.S. Pat. No. 5,484,097 to W. Heuvel, the subject matter of which is incorporated herein by reference, two semiconductor chips are mounted on two spaced apart support plates of each of two lead frames, and the two lead frames are disposed one on top of the other to provide two, two-chip stacks of chips. In one stack, the chips are stacked anode to anode, and in the other stack the chips are stacked cathode to cathode. The two lead frames, along with a third lead frame overlying the chip stacks, provide the necessary interconnections among the four chips as well as the device four terminals. The process described results in a single bridge rectifier. In practice, a plurality of devices, one each at a plurality of spaced apart device sites on the three-lead frame workpiece, are simultaneously (batch) fabricated.
The process is quite satisfactory except that a relatively large number (three) of separate lead frames are used; careful parts registrations are required and, in the process of mounting the individual chips on their respective support plates, one pair of chips for each bridge rectifier must be inverted with respect to the other pair thereof. All the chips are identical and, typically, are simultaneously identically fabricated as part of a single semiconductor wafer. In a final chip processing step, the wafer is diced into individual chips which, while completely separated, remain in a planar array of chips lightly adhered to, for example, a sheet of plastic. During mounting of the chips on the lead frames, two chips for each bridge rectifier are lifted from the array of chips and are directly transferred to and placed on a respective support plates of each lead frames. The other two chips for each bridge rectifier, however, must be removed from the array of chips and somehow turned upside down prior to their transfer to and placement on the other two lead frame support plates.
While many, and generally satisfactory techniques exist for the automatic inversion of semiconductor chips, the very fact that an extra process is required for one pair of chips not required for the other inevitably means that there is some loss of efficiency and some loss of product owing to parts breakage. The present invention eliminates the need for inverting one pair of chips relative to the other and, indeed, eliminates the practice of forming pairs of lead stacks. Also, preferably, only one chip mounting substrate is used.
SUMMARY OF THE INVENTION
Four identical semiconductor chips, each having a top and bottom surface are respectively mounted, bottom surface down, on four spaced apart mounting pads included on support plates. Two of the mounting pads are part of a common first support plate, hence the bottom surfaces of the two chips mounted on the first plate are electrically interconnected. The other two mounting pads are included on respective second support plates separate from one another and separate from the first support plate. In a preferred embodiment, all the mounting pads are located in one plane, and so are all the chips. The second support plates are larger than the mounting pads included thereon and each support plate exposes a bonding surface which is electrically connected to the bottom surface of the chip mounted on the bonding pad thereof. A respective first electrical interconnector is provided between each bonding surface of each second support plate and a top surface of a respective chip mounted on the first support plate. Thus, the bottom surfaces of the two chips mounted on the two second support plates are connected to respective top surfaces of the two chips mounted on the first support plate. A second electrical interconnector is provided between the top surfaces of the two chips mounted on the respective second support plates. The four chips are thus properly interconnected together in a bridge rectifier configuration. Four terminals of the device include a first terminal connected to the first support plate, second and third terminals connected to respective second support plates, and a fourth terminal connected to a top surface of one of the chips mounted on one of the second support plates.
According to a first aspect of the invention, the three support plates, including one “first” support plate and two “second” support plates, comprise three conductive areas on a surface of a printed circuit board including three printed conductive paths, serving as device terminals, extending into contact with respective support plates. A fourth printed conductive path, serving as a device fourth terminal, extends adjacent to one of the second support plates where an electrical interconnector electrically connects the fourth terminal to the top surface of the chip mounted on the one support plate. Using known printed circuit board technology, the various electrical interconnectors needed to provide the bridge rectifier configuration can comprise known wire bonds added during device fabrication or buried, pre-formed conductors of multi-layered printed circuit boards. Alternatively, the electrical interconnectors can comprise stamped metal “jumpers” developed in connection with a second aspect of the invention.
According to such second aspect of the invention, the three support plates, including the four mounting pads disposed thereon, are disposed along the lengths of three leads which, along with a fourth lead extending towards one of the mounting pads, are all integral portions of a single lead frame. After bonding of the four chips to respective mounting pads and providing necessary electrical interconnections to form a bridge rectifier, the four chips and portions of the lengths of the four leads are encapsulated in a housing. Portions of the leads extending from the housing are severed from each other and from the lead frame to provide externally extending terminals for the rectifier. The electrical interconnections are formed by known wire bonds or, preferably, by pre-formed metal jumpers themselves provided as parts of a lead frame.
REFERENCES:
patent: 5484097 (1996-01-01), Heuvel
patent: 0 058 852 (1982-09-01), None
patent: 0 391 832 (1990-10-01), None
patent: 60007759 (1985-01-01), None
patent: 61294845 (1986-12-01), None
Fabaany, Jr. Wael
General Semiconductor Inc.
Lee Hsien Ming
Mayer Fortkort & Williams PC
Williams Esq. Karin L.
LandOfFree
Hybrid S.C. devices and method of manufacture thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hybrid S.C. devices and method of manufacture thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hybrid S.C. devices and method of manufacture thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2911204