Hybrid processor and method for executing incrementally upgraded

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Details

395800, 395570, 395568, 395500, G06F 934

Patent

active

058288970

ABSTRACT:
Computer apparatus having a first processor that runs legacy software implemented using a first instruction set, and a second processor that runs new or updated software using a second instruction set. An operand memory is coupled to the first and second processors and stores shared operands in a native representation of the first instruction set. The second instruction set has an extended address space which is used to permit access by the new or updated software to the shared operands. To achieve this, the second processor has a software-implemented object request broker and a reference repository that contains information regarding the location and format of shared operands. When the new or updated software needs access to a shared operand in the operand memory, the nor or updated software invokes an object adapter for the type of operand being accessed, which in turn invokes the object request broker in order to obtain information from the reference repository, enabling the object adapter to locate and reformat the shared operand 24 as required by the new or updated application software. Methods that permit access to shared operands by the software that runs on both processors are also disclosed.

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