Hybrid package with non-insertable and insertable conductive...

Active solid-state devices (e.g. – transistors – solid-state diode – Miscellaneous

Reexamination Certificate

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Details

C257S678000, C438S106000, C324S755090, C439S073000

Reexamination Certificate

active

07053496

ABSTRACT:
A hybrid electronic circuit package (102, FIG.1) includes non-insertable conductive features (110) and insertable conductive features (112) at a surface of the package. A hybrid receptacle (120), such as a socket, for example, includes non-insertable contacts (124) and insertable contacts (126), which are positioned in a complementary manner with the non-insertable and insertable features of the package. A vertical securement device (132, 134, 136) applies a vertical compressive force to the package (102) to compress the non-insertable features (110) against the non-insertable contacts (124). Further, a normal force securement device can be used to provide a sustained normal force to compress the insertable features and contacts together. In one embodiment, the non-insertable features are land grid array lands and the insertable features are low insertion force features.

REFERENCES:
patent: 5532612 (1996-07-01), Liang
patent: 5569041 (1996-10-01), Sonobe et al.
patent: 6280202 (2001-08-01), Alden III, et al.
patent: 6354844 (2002-03-01), Coico et al.
patent: 6717277 (2004-04-01), Chung et al.
patent: 2003/0168738 (2003-09-01), Kabadi et al.
patent: 2003/0193089 (2003-10-01), Rumsey et al.

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