Hybrid open and folded digit line architecture

Details Hybrid open and folded digit line architecture Hybrid open and folded digit line architecture

2005-12-13

2005-12-13

Ho, Hoai (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S063000, C365S205000

Reexamination Certificate

active

06975552

ABSTRACT:
A digit line architecture for an array of memory cells exhibiting characteristics of both folded digit line architectures and an open digit line architectures. The digit line architecture includes first and second digit lines having first and second digit line segments. The memory cells of a column are coupled to the first digit line segments. The second digit line segment of the first digit line is located in the memory sub-array with which the column is associated and the second digit line segment of the second digit line extending into the other memory sub-array with which the column is not associated.

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Kirihata, T. et al., “A 113mm2600Mb/s/pin 512Mb DDR2 SDRAM with Vertically-Folded Bitline Architecture”, IEEE International Solid State Circuits Conference Feb. 2001, pp. 382-383 and 468.
Yoon, H. et al., “A 4Gb DDR SDRAM with Gain-Controlled Pre-Sensing and Reference Bitline Calibration Schemes in the Twisted Open Bitline Architecture”, IEEE International Solid-State Circuits Conference, Feb. 2001, pp. 378-379 and 467.

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