Hybrid of local oxidation of silicon isolation and trench isolat

Details Hybrid of local oxidation of silicon isolation and trench isolat Hybrid of local oxidation of silicon isolation and trench isolat

1996-03-28

1997-07-08

Dang, Trung

Fishing, trapping, and vermin destroying

437 69, 437 72, 148DIG50, H01L 2176

Patent

active

056460635

ABSTRACT:
A semiconductor structure includes isolation regions fabricated by a hybrid local oxidation of silicon (LOCOS) technique and a trench isolation technique. Wide and narrow gaps or spacings are etched in a multilayer silicon structure. The wide gaps are covered by a photoresist, and the narrow gaps are further etched to form deep trenches. The wide spacing and deep trenches are filled with an insulative material such as TEOS. The TEOS is etched and the structure is heated to cause local oxidation of silicon in the deep trench and wide spacing. The hybrid fabrication technique is particularly useful in complementary metal oxide semiconductor (CMOS) technology where wide isolation units are utilized to separate transistors sharing the same gate and trenches are utilized to isolate transistors sharing the same well.

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