Hybrid microelectronic array structure having electrically...

Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit

Reexamination Certificate

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C250S208100, C257S444000, C257S457000

Reexamination Certificate

active

06828545

ABSTRACT:

This invention relates to a hybrid microelectronic array structure in which a supported array is joined to a microelectronic integrated circuit and, more particularly, to such a hybrid microelectronic array structure wherein the supported array is segmented.
BACKGROUND OF THE INVENTION
Many imaging sensor systems utilize an optical system to focus the infrared or visible-light energy of a scene onto a detector array. One widely used detector array is the focal plane array (FPA), in which an array of detector elements is positioned at the focal plane of the optical system. The infrared or visible-light energy focused onto the detector elements is converted to electrical signals. The electrical signals responsive to the image are viewed on a display or processed by a computer, as for example with pattern recognition techniques.
The most sensitive FPA detector arrays are hybrid structures that use an optimized detector array and an optimized readout integrated circuit. The detector elements of the detector array are arranged to define pixels of an image and convert the incident infrared or visible-light energy to output electrical signals. The respective readout integrated circuits amplify and condition the electrical signals for subsequent use. The hybrid microelectronic array structures are typically cooled, as to about liquid nitrogen temperature, to further improve the signal-to-noise ratios of the output electrical signals.
Hybrid microelectronic array structures of several types are available and are widely used in focal plane arrays. However, the present inventors have recognized that available hybrid microelectronic array structures have limitations on their geometries and performance. Certain geometries of imaging sensor systems that would otherwise be highly advantageous cannot be made with available hybrid microelectronic array structures. Resolution, radiation hardness, reliability in the thermal cycling environment, and other properties of the available hybrid microelectronic array structures may be improved.
There is therefore a need for an improved hybrid microelectronic array structure. The present invention fulfills this need, and further provides related advantages.
SUMMARY OF INVENTION
The present invention provides a hybrid microelectronic array structure and a method for its fabrication. This approach yields improved electrical and thermomechanical performance of the hybrid microelectronic array structure by isolating the adjacent detector elements of the array. Electrical and thermomechanical interactions between adjacent detector elements are thereby reduced. Reduction of the electrical interactions results in improved electrical performance of the hybrid microelectronic array structure such as reduced crosstalk between the detector elements of adjacent pixels. Reduction of thermomechanical interactions results in greater mechanical reliability and reduced risk of failures when the hybrid microelectronic array structure is repeatedly thermally cycled by cooling to its operating temperature and later returning to ambient temperature. The hybrid microelectronic array structure may be made in either planar or curved forms, with the curved form leading to improved performance and increased compactness in several types of sensor systems.
In accordance with the invention, a hybrid microelectronic array structure comprises a microelectronic integrated circuit array comprising an array of microelectronic integrated circuits, with each of the microelectronic integrated circuits comprising a first supported-structure interconnect location and a second supported-structure interconnect location. The hybrid microelectronic array structure further comprises a supported array comprising an array of supported islands with each supported island having at least one supported element therein. There is at least one supported element for each of the microelectronic integrated circuits. Each of the supported islands comprises a first region and a second region, and each of the supported islands is electrically isolated from each of the other supported islands except through the microelectronic integrated circuit array. (There may be electrical communication through the circuitry of the microelectronic integrated circuit array.) Each of the two regions is preferably a semiconductor region. An interconnect structure extends between each of the microelectronic integrated circuits and its respective supported element. Each interconnect structure comprises a first interconnect extending from the first supported-structure interconnect location of each of the microelectronic integrated circuits to the first region of its respective supported element, and a second interconnect extending from the second supported-structure interconnect location of each of the microelectronic integrated circuits to the second region of its respective supported element. The interconnects are preferably bump interconnects comprising a deformable, electrically conductive material such as indium. The bump interconnects also serve as the mechanical supports to support the supported elements and supported islands from the respective microelectronic integrated circuits.
In a typical case, each microelectronic integrated circuit comprises an electrical interface circuit, and each supported element comprises an input/output element supported on the electrical interface circuit. In the most preferred embodiment, the electrical interface circuit is a readout integrated circuit, and the input/output element is a detector such as a light detector. In another embodiment, the electrical interface circuit is a driver integrated circuit, and the input/output element is an emitter such as a light emitter.
In the preferred application wherein the supported element is a light detector, the first semiconductor region of each of the supported islands is an n-doped semiconductor, and the second semiconductor region of each of the supported elements is a p-doped semiconductor (or they may be reversed). The detector elements may be sensitive to infrared radiation, or to visible light, ultraviolet light, X-rays, or other wavelengths, according to the materials of construction. Examples of operable detectors include mercury-cadmium-telluride diodes, indium antimonide diodes, quantum well infrared photodetectors (QWIP), and extrinsic impurity band conductor (IBC) material in silicon or germanium.
In one form, the microelectronic integrated circuit array and the supported array are each substantially planar. In another embodiment made possible by the mechanically isolated nature of the supported elements, the microelectronic integrated circuit array and the supported array are each curved. This arrangement permits the construction of focal curved arrays, which in turn are advantageously employed in certain sensor systems. The sensor systems using curved detector arrays may be made more compact and more accurate over a wide angular range than those using flat-plane detector arrays.
A method of fabricating a hybrid microelectronic array structure as applied to detectors comprises the steps of providing a readout integrated circuit array comprising an array of readout integrated circuits, with each of the readout integrated circuits comprising a first detector interconnect location and a second detector interconnect location. A detector array comprising an array of detector islands is prepared. There is a respective detector element for each of the readout integrated circuits. Each of the detector islands comprises a first semiconductor region and a second semiconductor region. The step of providing a detector array includes the steps of depositing the first semiconductor region onto a detector substrate and depositing the second semiconductor region onto the first semiconductor region. Detector islands are defined as electrically isolated islands, each detector island including a segment of the first semiconductor region overlying the detector substrate, and the second semiconductor region overlying the first semiconductor region. The

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