Hybrid interconnect substrate and method of manufacture thereof

Details Hybrid interconnect substrate and method of manufacture thereof Hybrid interconnect substrate and method of manufacture thereof

2003-01-06

2004-10-26

Norton, Nadine G. (Department: 1765)

Etching a substrate: processes

Forming or treating electrical conductor article

C438S106000, C438S108000, C438S118000, C029S831000

Reexamination Certificate

active

06808643

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a hybrid interconnect substrate and method of manufacture thereof, and more particularly to a hybrid substrate with high density interconnects and method of manufacture thereof.
2. Description of the Related Art
Conventional substrates used in flip chip package processes include buildup structures and laminate structures.
FIG. 1
shows a flip chip package structure. A high density interconnect (HDI) structure
102
is formed on a base material
100
as shown in FIG.
1
. The base material
100
and the high density interconnect structure
102
constitute the substrate of a flip chip package structure. The high density interconnect structure bonds to a “flipped” chip
112
through the soldering between bumps
110
and bonding pads
108
so as to form a flip chip package structure. The high density interconnect structure
102
comprises a dielectric part
104
and a circuit
106
. The high density interconnect structure
102
is basically multi-level and it can be formed by building up or laminating.
Flip chip substrates which have high density interconnect structures directly formed level by level on base materials are buildup substrates. The structure of the buildup substrate is formed by directly forming a high density interconnect structure (HDI) on a carrier substrate/core substrate which is a printed circuit board (PCB). By directly forming a high density interconnect structure on a carrier substrate/core substrate, the HDI-on-PCB substrate has advantages of accurate buildup line/space and thickness control, accurate impedance control and embedding passive components directly. The structure of a buildup substrate can be also formed by directly forming a high density interconnect structure (HDI) on the both sides of a carrier substrate/core substrate. However, the HDI-on-PCB substrate has disadvantages of substrate dimension deviation in each buildup process, causing high cost and low yield. Moreover, since the HDI is directly formed on PCB carrier substrate/core substrate, the size of the build substrate is limited to the maximum size of the PCB carrier substrate/core substrate which is 610×610 millimeters. Furthermore, the limitation of the exist HDI substrate equipment has disadvantages for new developments like design rule reduction, high yield, embedded passive components and so on.
In view of the drawbacks mentioned with the prior art processes and structures of flip chip substrates, there is a continued need to develop new and improved processes and structures that overcome the disadvantages associated with prior art processes and structures.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a hybrid substrate with high density interconnects having superior production yield by separately forming low-density substrates and high-density circuits.
It is another object of this invention to provide a hybrid substrate with high density interconnects having low production cost by using well developed thin-film transistor liquid-crystal display (TFT-LCD) integrated circuit process techniques and large size substrates.
It is another object of this invention to provide a hybrid substrate with high density interconnects having excellent impedance control.
It is another object of this invention to provide a hybrid substrate with high density interconnects having embedded passive components.
To achieve these objects, and in accordance with the purpose of the invention, the invention provides a method for forming a interconnect substrate, the method comprises the following steps. A transparent handle substrate is firstly provided. Then an adhesive photo-decomposing dielectric layer is formed on said handle substrate. Next, a multi-level interconnect structure is formed on said adhesive photo-decomposing dielectric layer. Then an adhesive bonding film is formed on said multi-level interconnect structure. Next, the adhesive bonding film is patterned to expose bonding pads of said multi-level interconnect structure. The multi-level interconnect structure is then bonded with a carrier substrate by soldering said bonding pads to conductors on said carrier substrate. The photo-decomposing dielectric layer is then decomposed. Finally, the handle substrate and the photo-decomposing dielectric layer are removed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 6114239 (2000-09-01), Lake et al.
patent: 6441473 (2002-08-01), Deshmukh
patent: 6462423 (2002-10-01), Akram et al.

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