Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2011-02-03
2011-12-27
Soward, Ida M (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S698000, C257S700000, C257S774000, C257SE21597
Reexamination Certificate
active
08084852
ABSTRACT:
A hybrid integrated circuit device having high mount reliability comprises a module substrate which is a ceramic wiring substrate, a plurality of electronic component parts laid out on the main surface of the module substrate, a plurality of electrode terminals laid out on the rear surface of the module substrate, and a cap which is fixed to the module substrate to cover the main surface of the module substrate. The electrode terminals include a plurality of electrode terminals which are aligned along the edges of the module substrate and power voltage supply terminals which are located inner than these electrode terminals. The electrode terminals aligned along the substrate edges are coated, at least in their portions close to the substrate edge, with a protection film having a thickness of several tens micrometers or less. Connection reinforcing terminals consist of a plurality of divided terminals which are independent of each other, and are ground terminals.
REFERENCES:
patent: 5519176 (1996-05-01), Goodman et al.
patent: 5639989 (1997-06-01), Higgins, III
patent: 5672911 (1997-09-01), Patil et al.
patent: 5767447 (1998-06-01), Dudderar et al.
patent: 5796165 (1998-08-01), Yoshikawa et al.
patent: 5798571 (1998-08-01), Nakajima
patent: 5832598 (1998-11-01), Greenman et al.
patent: 5847936 (1998-12-01), Forehand et al.
patent: 5870289 (1999-02-01), Tokuda et al.
patent: 5962917 (1999-10-01), Moriyama
patent: 6052287 (2000-04-01), Palmer et al.
patent: 6132543 (2000-10-01), Mohri et al.
patent: 6188127 (2001-02-01), Senba et al.
patent: 6225702 (2001-05-01), Nakamura
patent: 6229100 (2001-05-01), Fjelstad
patent: 6278264 (2001-08-01), Burstein et al.
patent: 6310303 (2001-10-01), Luvara et al.
patent: 6330165 (2001-12-01), Kohjiro et al.
patent: 6362964 (2002-03-01), Dubhashi et al.
patent: 6429454 (2002-08-01), Hatada et al.
patent: 6433411 (2002-08-01), Degani et al.
patent: 6435883 (2002-08-01), Warren
patent: 6492719 (2002-12-01), Miyamoto et al.
patent: 6538898 (2003-03-01), Prindivill et al.
patent: 6710441 (2004-03-01), Eden et al.
patent: 6734550 (2004-05-01), Martin et al.
patent: 6777819 (2004-08-01), Huang
patent: 6778406 (2004-08-01), Eldridge et al.
patent: 7239014 (2007-07-01), Ogawa et al.
patent: 7323770 (2008-01-01), Moriyama et al.
patent: 2003/0156400 (2003-08-01), Dibene et al.
patent: 2004/0056367 (2004-03-01), Jassowski
patent: 2005/0250254 (2005-11-01), Ishizu et al.
patent: 9-69584 (1979-08-01), None
patent: 6-291216 (1994-10-01), None
patent: 8-148597 (1996-06-01), None
patent: 9-018145 (1997-01-01), None
patent: 09-22692 (1997-01-01), None
patent: 09116091 (1997-05-01), None
patent: 9-153286 (1997-06-01), None
patent: 10-275875 (1998-10-01), None
patent: 10-308464 (1998-11-01), None
patent: 11-224915 (1999-08-01), None
patent: 2000-323645 (2000-11-01), None
patent: 2000-349225 (2000-12-01), None
patent: 1996-32697 (1996-09-01), None
patent: 2000-11461 (2000-02-01), None
Moriyama Shinji
Yamada Tomio
Mattingly & Malur, PC
Renesas Electronics Corporation
Soward Ida M
LandOfFree
Hybrid integrated circuit device, and method for fabricating... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Hybrid integrated circuit device, and method for fabricating..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hybrid integrated circuit device, and method for fabricating... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4315937