Hybrid integrated circuit device

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S050510, C174S255000, C174S261000, C361S760000, C361S807000

Reexamination Certificate

active

06232562

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a hybrid integrated circuit device in which a laid core type coil component having a low profile (low height) is mounted on a substrate, and in particular to a configuration of a conductor pattern provided on the substrate upon which the laid core type coil component is mounted.
BACKGROUND OF THE INVENTION
As electronic devices such as portable information terminals have become light, thin and small in recent years, hybrid integrated circuit devices (so-called hybrid ICs) have been used in abundance in such products. In each hybrid integrated circuit device, electronic components, such as capacitors, transistors, transformers, and ICs, forming one circuit block, such as DC-DC converters, are mounted on one high density substrate by using the surface mounting method.
As a matter of course, individual electronic components of hybrid integrated circuit devices must be very small in size and low in height. Specifically, it is necessary to decrease the height of coil components (such as transformers, filters, choke coils), which tend to have relatively large height dimensions. As a result, a laid core type coil component
10
, as shown in
FIG. 6
, has been devised.
This laid core type coil component
10
consists of a ferrite core
5
, which has a flattened-columnar wound core portion (represented by a broken line)
2
and collars
3
and
4
, formed integrally with the wound core portion
2
, on both ends of the longitudinal direction of the wound core portion
2
; a plurality of external electrodes
6
provided on end faces of the collars
3
and
4
of the ferrite core
5
; and a winding
8
composed of an insulation covered conductor (such as a polyurethane covered conductor or a polyester covered conductor) wound around the winding core portion
2
of the ferrite core
5
and conductively bonded to the external electrodes
6
of the collars
3
and
4
, respectively, at ends thereof, by thermo-compression bonding or the like.
In general, spacing between the collars
3
and
4
located at both ends is relatively wide, and a winding portion
9
, composed of wound core portion
2
and winding
8
, is positioned extremely close to a substrate. Such a configuration can be seen in
FIG. 7
, a side view of the laid core type coil compound
10
shown in
FIG. 6
which further shows the previously described state of mounting on the substrate, as well as the magnetic flux B (i.e., magnetic lines of force) which terminate at collars
3
and
4
, and emanate above and below the winding portion
9
.
Various materials may be utilized for formation of the substrate
11
, used for mounting of the hybrid integrated circuit device, such as alumina or glass epoxy. Typically, electrode lands
14
and a wiring pattern
12
are provided on one main surface of the substrate
11
(obverse of the substrate), and the laid core type coil component
10
and other chip components are surface mounted on the substrate by solder reflow or the like. In addition, a conductor pattern including a ground pattern
13
is provided on the opposite surface of the substrate, or in the interior of the substrate. Furthermore, multilayer substrates each having a number of conductor patterns, such as wiring patterns and ground patterns, formed within the substrate as a laminate, are frequently used. The conductor material for the conductor patterns, such as the wiring pattern
12
and the ground pattern
13
, is usually aluminum, copper foil, silver foil, gold foil, silver-palladium, or the like.
Typically, in the conventional hybrid integrated circuit device as described above, the conductor pattern including the ground pattern
13
is provided as a coating, layer or plane on the reverse of the substrate to the laid core type coil component, or in the interior of the substrate, in as wide a layer as possible, in order to intensify the ground potential as a noise countermeasure as shown in FIG.
7
. Since the magnetic flux B heading from collars
3
and
4
emanates above and below the winding as described above, the laid core type coil component
10
is affected by the conductor pattern, such as the ground pattern
13
, in a region located right under the winding portion
9
. As a result, the inductance value of the coil component
10
is lowered by approximately 10 to 30% as compared with the inductance valve before mounting.
In addition, the inductance value of the coil component
10
also may be affected by the peripheral environment of the substrate
11
on which the coil component
10
is mounted, such as the shape of the conductor pattern located directly under the wiring portion
9
, and arrangement of the peripheral electronic components. Therefore, it is difficult to accurately determine beforehand the inductance value of the coil component after final mounting upon the substrate and placement of peripheral electronic components upon the substrate.
SUMMARY OF THE INVENTION
The present invention has been made in view of solving the above described deficiencies of conventional hybrid integrated circuit devices. An object of the present invention is to provide a hybrid integrated circuit device having a conductor pattern which avoids decrease of the inductance value of the laid core type coil component mounted on the hybrid integrated circuit device, and which allows adjustments of the laid core type coil component after the coil component is mounted on the substrate in order to achieve the desired inductance valve.
The present invention achieves the above described object by providing a first embodiment of a hybrid integrated circuit device having electrode lands on at least one main face of a substrate, a laid core type coil component mounted on at least one main face of the substrate, and a conductor pattern including a ground pattern provided on at least either a main surface of the substrate opposite the main face upon which the laid core type coil component is mounted or in an interior of the substrate, wherein a magnetic flux passing window having an absence of ground pattern, is provided in an orthographic projection area Z corresponding to a winding portion of the coil component in the conductor pattern.
Furthermore, the present invention achieves the above described object by providing a second embodiment of a hybrid integrated circuit device having electrode lands on at least one main face of a substrate, a laid core type coil component mounted on at least one main face of the substrate, and a conductor pattern including a ground pattern provided on at least either a main surface opposite the face upon which the laid core type coil component is mounted on the substrate or in the interior of the substrate, wherein a magnetic flux passing window having an absence of the ground pattern, is provided in an orthographic projection area Z corresponding to a winding portion of the coil component in the conductor pattern, and an extending portion of a wiring pattern extends in the orthographic projection area Z of the winding portion.
The present invention also achieves the above described object by providing a third embodiment of a hybrid integrated circuit device having electrode lands on at least one main face of a substrate, a laid core type coil component on at least one main face of the substrate, and a conductor pattern provided on at least either a main surface opposite the face upon which the laid core type coil component is mounted on the substrate or in the interior of the substrate, wherein a magnetic flux passing window having an absence of conductor pattern is provided in an orthographic projection area corresponding to a winding portion of the coil component in the conductor pattern.
The present invention also achieves the above described object by providing a fourth embodiment of a hybrid integrated circuit device having at least a laid core type coil component mounted on one main surface of a substrate, wherein a conductor pattern for inductance adjustment of the coil component is provided on an orthographic projection area corresponding t

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