Hybrid FIR/IIR analog filter

Details Hybrid FIR/IIR analog filter Hybrid FIR/IIR analog filter

1999-02-03

2001-01-23

Pierre, Peguy Jean (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S144000

Reexamination Certificate

active

06177897

ABSTRACT:

BACKGROUND AND SUMMARY OF THE INVENTION
The present invention relates to integrated circuit analog filter structures.
BACKGROUND
Mixed-Signal Processes
As signal processing systems move to higher levels of integration, it becomes necessary to integrate analog functions on chips in which most of the area is consumed by digital circuitry. When the analog circuitry occupies only a small percentage of the total chip area, economic considerations limit the addition of any process steps, such as fabrication of high-value capacitors, which are not required by the digital circuits.
Switched Capacitor Architectures
The need to have monolithic analog filters motivated circuit designers to investigate alternatives to conventional active-RC filters. The switched capacitor (“SC”) filter provided a practical alternative. The original idea was to replace a resistor by an SC simulating the resistor. Thus the equivalent resistor could be implemented with a capacitor, and two switches operating with two clock phases. The basic building blocks involved in SC circuits are capacitors, switches, and op-amps, which can be used to make higher-order blocks such as voltage gain amplifiers, integrators, and second-order filters. These are discrete-time filters that operate like continuous-time filters, but through the use of switches, the capacitance values can be kept very small. As a result, SC filters are amenable to VLSI implementations.
The filters are characterized by difference equations in contrast to differential equations for continuous-time filters. The z-transform is the mathematical operator used to solve linear constant-coefficient difference equations which are used to help define sampled-data systems such as SC circuits.
Switched-capacitor filter architectures are discussed in greater detail in the following books: R. JACOB BAKER, CMOS—CIRCUIT DESIGN, LAYOUT, AND SIMULATION (IEEE Press, 1998); WAI-KAI CHEN, THE CIRCUITS AND FILTERS HANDBOOK (CRC Press and IEEE Press, 1995); S. NORSWORTHY, DELTA-SIGMA DATA CONVERTERS (IEEE PRESS, 1997); and R. GREGORIAN, ANALOG MOS INTEGRATED CIRCUITS FOR SIGNAL PROCESSING (John Wiley & Sons 1986); all of which are herein incorporated by reference.
FIR Filters
A semi-digital FIR filter can be implemented using a SC technique. A semi-digital reconstruction filter, in addition to converting digital samples into analog levels (digital function), converts discrete-time signals into continuous time (the analog reconstruction function). A function of the semi-digital reconstruction filter is to attenuate out-of-band quantization noise introduced by the preceding stages, and the spectral images that remain at multiples of the oversampling frequency. In a SC implementation, the analog signals are represented by charges stored on capacitors that can be summed using a SC summing amplifier. The individual capacitors in such an implementation need not have low voltage coefficients because the voltage across these capacitors is either 0 or Vref; thus they can be realized simply with MOS gate structure which are appropriately biased. However, the feedback capacitor in the summing amplifier must have a low voltage coefficient in order to ensure that the summing operation meets the linearity requirements of the overall converter.
Semi-digital reconstruction filters are also discussed in detail in; “A CMOS OVERSAMPLING D/A CONVERTER WITH A CURRENT-MODE SEMIDIGITAL RECONSTRUCTION FILTER, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 28, No. 12, DECEMBER 1993,” herein incorporated by reference.
Quantization Noise
The heart of a sigma-delta modulator or analog-to-digital converter (“ADC”) is a quantizer enclosed in a feedback loop. A quantizer maps real numbers into a finite set of possible representative values. The quantization operation is inherently non-linear and hence produces quantization noise. Quantization noise is defined as the noise introduced during the process whereby an analog wave is divided into a finite number of subranges, each represented by an assigned (quantized) value. This noise component is present along with the desired signal and needs to minimized (filtered) in a digital-to-analog converter (“DAC”). The feedback loop shapes the noise such that it will lie outside the signal bandwidth where it can ultimately be filtered out.
Hybrid FIR/IIR Analog Filter
The present application discloses a means for filtering the coarsely quantized output of a sigma-delta modulator for digital-to-analog (“D/A”) conversion. Sigma-delta modulators do not attenuate noise at all. Instead, they add quantization noise that is very large at high frequencies. However, since most of the noise is out-of-band (i.e. outside the signal bandwidth), it can be filtered, leaving only a small portion within the signal bandwidth. This invention reduces the out-of-band quantization noise produced by the sigma-delta modulation, producing a clean analog signal. A combination of finite-impulse-response (“FIR”) and infinite-impulse-response (“IIR”) techniques are used in the same analog filter to obtain the benefits of each while alleviating some of the problems of both. In the past, FIR and IIR filtering approaches have been used separately, but they have not been combined in this way.
An advantage of the disclosed method and structure is that it provides a less complex solution by requiring fewer taps than the present FIR approach. Another advantage is that it does not require as much area as an IIR filter, and therefore is less costly. For example, where prior art methods use more filter stages or higher capacitor ratios in the integrator, the disclosed technique requires smaller capacitor ratios (e.g. on the order of approximately 10/1) or fewer stages. Another advantage is that the disclosed embodiments are applicable to multilevel quantization architectures.


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