Hybrid dual threshold transistor multiplexer

Details Hybrid dual threshold transistor multiplexer Hybrid dual threshold transistor multiplexer

1999-04-08

2000-07-11

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Converging with plural inputs and single output

327407, H03K 1756

Patent

active

06087886&

ABSTRACT:
This invention deals with various circuits using transistors having two different threshold voltages designated high threshold voltage (HVT) and low threshold voltage (LVT). These circuits employ the know faster response time of LVT transistors while substantially avoiding the known greater leakage current of LVT transistors. A two input multiplexer includes two transmission gates driven in opposite phases by a selection control signal. One transmission gate, preferably the transmission gate most often selected, includes LVT transistors while the other transmission gate includes HVT transistors. A hybrid threshold voltage D flip-flop circuit employs LVT transistors in input transmission gates of both a master latch and a slave latch. In a conventional circuit, the output invertor of the slave latch also includes LVT transistors. In a split slave dual path circuit, the intermediate inverter also includes LVT transistors. In a push-pull output register, the inverter and transmission gate of the push-pull circuit may include LVT transistors. In a first alternative, only the transmission gates in the push-pull circuit and the slave latch include LVT transistors. In a second alternative, only the inverter on the push-pull circuit and the output inverter of the slave latch include LVT transistors. In a third alternative, the push-pull circuit is a hybrid threshold voltage tri-state inverter.

REFERENCES:
patent: 5376829 (1994-12-01), Rogers et al.
patent: 5625303 (1997-04-01), Jamshidi

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