Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2002-08-12
2003-08-19
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S337000
Reexamination Certificate
active
06608503
ABSTRACT:
BACKGROUND
1. Technical Field
The field of the invention is related to data comparators and more particularly to chopper-topology data comparators.
2. Description of Related Art
Data comparators are commonly used when an analog signal (e.g., one that can assume continuously variable voltage and/or current characteristics versus time) must be translated to a digital format. The translation can be performed by an analog-to-digital converter, or “ADC”, which is comprised of a number of data comparators. The act of translation is referred to as sampling or digitization.
Applications requiring digitization include, but are not limited to, the digital recording of audio and/or video images, the digital processing of audio and/or video images for transmission or reception, as part of a transducer for processing of non-electrical signals such as mechanical or optical or magnetic sensors, etc. A variety of low-power electronic devices such as mobile stations, personal digital assistants, and digital cameras, to name but a few, rely on digitization of analog signals.
The performance of ADCs may be specified in terms of several basic characteristics including, but not limited to, power dissipation, maximum sampling rate, minimum voltage supply, noise immunity, and complexity. The data comparator drives the fundamental limits of each of these characteristics. Required specifications vary considerably among the applications of ADCs, but many require low power (microwatts/comparator), sample rates over 50 MSPS (50×10
6
samples/second), low voltage supply (down to 1V or less), and excellent noise immunity (typically produced by differential signaling).
A known topology that facilitates good characteristic specifications is the chopper topology. The topology features a gain stage, a continual auto-cancellation of offset voltage errors that accrue at the input of the gain stage, relatively low power consumption, high sampling rates, and low voltage supply operation. Several enhancements to the basic chopper topology can further improve circuit characteristics and comprise the prior art. However, prior art chopper-topology comparators typically compromise one or more of the specifications to favor the remainder.
For example, several data comparator topologies require an explicit output latch as an auxiliary circuit. Others require a relatively large number of passive charge storage elements (capacitors), and some have complex clock sequences. Still others, although utilizing differential signaling, make use of only half the differential voltage between the input voltage signal and the reference voltage signal.
Some data comparators employ only a single gain stage, which reduces the differential gain, requires a higher-gain output latch, and leaves the input voltage signal and reference voltage signal susceptible to kickback noise generated by the output latch. Most data comparators also lack a mechanism to prevent unnecessary, excessive current draw by the inverter amplifiers in the latched state.
While typical chopper-topology comparators can satisfy various performance criteria in piecemeal fashion, their ability to do so is degraded as voltage supplies are reduced below 1.5 V due to the aforementioned deficiencies. Thus, a data comparator that offers high performance in all performance categories while operating at low input voltages is desired.
SUMMARY
In a first principal aspect, a method of measuring an input voltage using a first half-cell comparator and a second half-cell comparator is disclosed, wherein each half-cell comparator includes a first amplification stage, a second amplification stage, at least one first coupling component for coupling voltage to the input of the first amplification stage, and at least one second coupling component for coupling an output of the first amplification stage to an input of the second amplification stage. The method may include applying, during an auto-zero time period, the input voltage to the first coupling component of the first half-cell comparator, and also applying a reference voltage to the first coupling component of the second half-cell comparator.
The method may also include applying, during a sample time period, the reference voltage to the first coupling component of the first half-cell comparator, and also applying the input voltage to the first coupling component of the second half-cell comparator during the sample time period.
During a third time period, the latching period, the output of the second amplification stage of the first half-cell comparator may be coupled to the input of the second amplification stage of the second half-cell comparator; also during the third time period, the output of the second amplification stage of the second half-cell comparator may be coupled to the input of the second amplification stage of the first half-cell comparator.
In a second principal aspect, a method of measuring an input voltage using a first half-cell comparator and a second half-cell comparator is disclosed. The method is similar to the method discussed above, but further includes receiving at a control circuit, during a third time period, complementary half-cell outputs from the first and second half-cell comparators, wherein one output is substantially equal to a maximum supply voltage and wherein the complementary output is substantially equal to a minimum supply voltage.
Also during the third time period, the method includes outputting from the control circuit a maximum and a minimum control voltage, wherein the maximum and the minimum control voltage are substantially the same regardless of which half-cell comparator output is substantially equal to the maximum supply voltage and regardless of which half-cell comparator output is substantially equal to the minimum supply voltage.
The method further includes receiving, during the third time period, the maximum and minimum control voltages at the first amplification stage of each half-cell comparator, and disabling the first amplification stage of each half-cell comparator in response to the control voltages.
In a third principal aspect, a voltage measuring circuit comprising a first half-cell comparator and a second half-cell comparator is disclosed. Each half-cell comparator can include a first amplification stage, at least one first coupling component (such as a capacitor) for coupling voltage to the input of the first amplification stage. The circuit may also include a first pair of complementary clocked analog switches for applying either a reference voltage or an input voltage to each first coupling component, the first pair of complementary clocked analog switches connected so that when the input voltage is applied to the first half-cell, the reference voltage is applied to the second half-cell, and when the reference voltage is applied to the first half-cell, the input voltage is applied to the second half-cell.
The circuit may further include a second amplification stage and at least one second coupling component for coupling the output of the first amplification stage to the input of the second amplification stage. The output of the second amplification stage can be latched by a cross-coupling clocked analog switch that connects the output of the second amplification stage of one half-cell to the input of the second amplification stage of the other half-cell.
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McShane Erik A.
Radhakrishnan Manigandan
Shenai Krishna
Shakti Systems, Inc.
Tran Toan
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