Huffman code decoding circuit

Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses

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H03M 740

Patent

active

054670888

ABSTRACT:
A huffman code decoding circuit has a memory storing a decoded word and a code length or a pointer to be accessed in the next time determined on the basis of a state transition upon decoding of a bit variable length code per every one or n bits and a flag representative of the decoding condition of the code and outputting the decoded word and the code length or the pointer for next access and the flag corresponding to an access address of m bits. A latching circuit latches the pointer of m-1 bit output from the memory when the flag is indicative of continuation of decoding, and is reset when the flag output from the memory is indicative of completion of decoding. A selector selectively outputs n-1 bit from one of the latching circuit and the bit variable length code to the memory, according to selection for decoding of the bit variable length code per every 1 bit or every n bit.

REFERENCES:
patent: 5208593 (1993-05-01), Tong et al.

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