Housing having a back panel with conductive interconnects

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Reexamination Certificate

active

06377469

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention is directed to a chassis having a backplane carrying printed interconnects which receive electrical assemblies with at least one assembly having a processor unit which is connected via a separate data and/or control bus to at least one bulk storage.
Large quantities of data are held in bulk stores in data processing and communication systems, and these are capable of either being accessed via a data and/or control bus, for example what is referred to as a “SCSI-2” data/control bus (“small computer system interface-2”), or being accessed proceeding from a processor unit. Proceeding from the processor unit in a ribbon cable, such an “SCSI-2” data/control bus deriving from the PC world is usually conducted as a DZ-chain from one bulk store to the next bulk store and is terminated (actively or passively) at both ends by a fixed bus termination. At the bulk storages, the bus signals are conducted onto the printed circuit board present in the respective bulk storage with spur lines via a plug-connector system.
When bulk storages are then to be co-incorporated in a chassis of data processing and communication systems, then this was previously achieved, particularly in PC technology, in that the connection of the bulk storages to one another and to a processor assembly is implemented with a ribbon cable or an electrically inadmissible lengthening of the spur line was accepted.
U.S. Pat. No. 4,811,275 discloses a chassis into which bulk storages can be integrated. However, this can only be achieved with added structural outlay.
SUMMARY OF THE INVENTION
An object of the present invention is then to disclose a way of how a chassis of the species initially cited can be fashioned in order to be able to integrate bulk storages in a chassis with comparatively little structural outlay.
This object is achieved by the data and/or control bus being conducted from a respective processor unit to a backplane or panel and the bus is conducted over each bulk storage assembly in the form of a bus loop proceeding at least largely in a printed circuit board as printed interconnects and the bulk storage is connected to the bus loop of the storage assembly. The invention thereby yields the advantage that, due to the omission of an aforementioned ribbon cable to be conducted from assembly to assembly as a daisy-chain, not only is a cost-saving established but the immunity to interference of, for example, a data processing or, respectively, communication system accommodated in a chassis is also improved compared to the traditional cable structure. No special wiring backplanes and additional EMC shielding measures are thereby required for the proposed guidance of data and/or control buses. Finally, no limitations are established or, respectively, no complicated manipulation is required for the installation or removal of bulk storages into or from a chassis. On the contrary, the assemblies containing the bulk storages can be plugged or, respectively, pulled under tension proceeding from the front side of the chassis, like the other assemblies.
Advantageous developments of the present invention include the data and/or control bus is parted on the printed circuit board of a bulk storage assembly and a ribbon cable plug-connector element is provided at the two bus transition locations, which are connected to the ribbon cable by ribbon cable plug-connector elements and an additional ribbon cable plug-connector is provided at the ribbon cable to connect a bulk storage assembly thereto. Preferably, the data and/or control bus is terminated at each end with a bus terminal. The advantages of these developments thereby derive on the basis of simple design measures in order to be able to connect a plurality of bulk storages to a processor unit in common via data and/or control bus. The advantage of the development is the possibility of being able to insert commercially obtainable bulk storages into the bulk storage assemblies, for example bulk storages known form PC technology.


REFERENCES:
patent: 4700274 (1987-10-01), Laut
patent: 4811275 (1989-03-01), Balogh, Jr. et al.
patent: 4882702 (1989-11-01), Struger et al.
patent: 5463772 (1995-10-01), Thompson et al.
patent: 5692043 (1997-11-01), Gliga et al.
patent: 5936840 (1999-08-01), Satwinder
patent: 5958030 (1999-09-01), Kwa
patent: 6081430 (2000-06-01), La Rue
patent: 6202110 (2001-03-01), Coteus et al.
patent: 3608046 (1987-09-01), None
patent: 297 07 156 (1997-07-01), None
patent: 0 438 013 (1991-07-01), None
patent: WO 80/01628 (1980-08-01), None

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