Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2001-04-10
2003-06-10
Paladini, Albert W. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S782000, C257S784000, C257S774000, C257S787000, C257S502000
Reexamination Certificate
active
06576995
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a housing for semiconductor chips that is suitable, in particular, for radio-frequency components.
For mounting semiconductor chips, there are already a series of different housing developments in existence that differ in terms of the configuration of the chip on a carrier substrate and also the electrically conductive connections toward external connections. Usually, a housing is understood to mean just a carrier or a frame suitably patterned with electrical conductors on which the semiconductor chip is fixed and contact-connected and subsequently encapsulated by a potting compound or molding compound.
U.S. Pat. No. 4,906,802 to Castleman describes a chip carrier in which a substrate produced from a casting compound and serving for accommodating a semiconductor chip is provided with electrical conductors on upper sides. European Patent Application EP 0 996 154 A1 describes a semiconductor component on a carrier made of a thermoplastic material. In the carrier, the contacts of a chip are applied by solder bowls on a metallization layer of the surface of the carrier and are electrically conductively connected to connection contacts on the rear side of the carrier by vias through the carrier. German Published, Non-Prosecuted Patent Application DE 197 28 992 A1 describes a housing for a semiconductor body that has a supporting frame made of a plastic. Into the frame is inserted a semiconductor chip with connection elements disposed in cutouts in a passivation layer.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a housing for semiconductor chips that overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and that makes contact on both sides, that can be produced cost-effectively in large numbers, and that affords a high degree of flexibility in the configuration of the electrical connections without additional process complexity.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a housing for semiconductor chips, each chip having a front side, a rear side, and at least one chip contact on each of the front side and the rear side, including a plastic base substrate having at least one region for accommodating a semiconductor chip having a front side with at least one chip contact and a rear side with at least one chip contact, and two mutually opposite sides having a patterned metallization layer, one of the sides contacting the chip and another of the sides contacting an external electrical connection, at least two pads formed in the patterned metallization layer on one of the sides of the base substrate, one of the two pads connected to the at least one chip contact on the front side of the chip and another of the two pads connected to the at least one chip contact on the rear side of the chip, at least one pad formed in the patterned metallization layer on another of the sides of the base substrate, the at least one pad connected to the external electrical connection, a bonding wire, one of the two pads connected to a chip contact of the chip through the bonding wire, and another of the two pads directly applied to another chip contact of the chip.
The housing according to the invention uses a base substrate made of plastic. The substrate can be produced cost-effectively in large numbers, e.g., in a conventional injection-molding method. The base substrate is provided with suitably patterned metal layers on its surfaces. The metal layers are provided as pads and as conductor tracks. The base substrate preferably has at least one recess or cutout into which a semiconductor chip is inserted.
The dimensions and the patterning of the base substrate may be chosen such that it serves as housing for a multiplicity of semiconductor chips. After the insertion of the semiconductor chips and the contact-making process, and also, if appropriate, after further production steps that are required, the portions of the base substrate that are provided for the individual components can be separated from one another and the envisaged individual housings with respective components can, thus, be separated. The simplest way of accomplishing the separation is by sawing, breaking, or stamping, preferably, at emplacement regions or desired breaking points provided on the base substrate for the tool used. The base substrate that forms the starting point for production is, therefore, preferably an array of separable chip housings.
The base substrate may be provided with vias as early as during production. The vias later enable electrical connections from pads on the front side to pads on the rear side of the substrate. The channels required for the vias in the plastic material may already be formed during the production of the plastic body of the base substrate, e.g., by using a suitable mold for an injection-molding method. Instead, the channels can be produced subsequently by drilling or etching in the base substrate.
A preferred production method provides for the surface of the base substrate to be completely metallized. The plastic surface is provided with a thin metal layer, for example, by electro-deposition. The applied metal layer is patterned subsequently, which can be done, e.g., with the aid of writing lasers or lithographic (etching) methods. In principle, however, it is also possible to use a suitably adapted mask technique to apply the metal layer already with the envisaged structure. The patterned metal layer is preferably produced on the front side—provided for the fitting of a semiconductor chip—and the opposite rear side of the substrate. For an electrically conductive connection between a pad of the metal layer on the front side to a pad on the rear side, the metal is also introduced into the channels provided for the vias. If no such channels are provided, a corresponding conductive connection between the front side and the rear side of the substrate can also be implemented by suitably patterned conductor tracks that are formed in the applied metal layer and are present on the side walls of the base substrate.
The pads that are patterned on the rear side of the base substrate in the applied metal layer are suitably configured for making electrical contact with corresponding pads, e.g., on a printed circuit board. The pads on the base substrate may have any desired geometrical shapes. In addition, the pads may be provided with conventional protection against corrosion, e.g., gold plating.
In accordance with another feature of the invention, the at least one first pad is electrically connected to the at least one chip contact and the at least one second pad is electrically connected to the external conductor.
In accordance with a further feature of the invention, the one of the two pads is connected to the at least one chip contact on the front side of the chip through the bonding wire, and the another of the two pads is directly applied to the at least one chip contact on the rear side of the chip.
In accordance with an added feature of the invention, the metallization layer is disposed a surface of the base substrate, and at least a part of the metallization layer forms an electrically conductive connection between at least one of the at least two pads and at least one of the at least one pad.
In accordance with an additional feature of the invention, the base substrate has at least one channel connecting the two mutually opposite sides, and metal introduced into the at least one channel forms at least one via electrically connecting at least one of the at least two pads to at least one of the at least one pad.
In accordance with a concomitant feature of the invention, the base substrate has a height no greater than 2 mm, a width no greater than 2 mm, and a depth no greater than 2 mm.
The housing according to the invention can, therefore, be produced in large numbers in a comparatively simple manner using conventional method steps. There is obviously great freedom in the p
Högerl Jürgen
Paulus Stefan
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Paladini Albert W.
Stemer Werner H.
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