Hot carrier measuring circuit

Details Hot carrier measuring circuit Hot carrier measuring circuit

1999-05-06

2001-06-05

Metjahic, Safet (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010, C324S762010

Reexamination Certificate

active

06242937

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a hot carrier measuring circuit that measures characteristic deterioration of a semiconductor device.
2. Description of the Conventional Art
Electrons which are accelerated by an electric field of a channel collide with Si lattices and when the energy thereof exceeds a band-gap energy which is about 1.1V, thereby generating electron-hole pairs (impact ionization). Here, the generated hole is pulled to a silicon substrate side and thus observed as a substrate current, while the electron is pulled to a drain side and further pulled to an oxide film by an electric field which is organized by a gate voltage. Some electrons thereof which are seized by SiO
2
remain as electric charges, which results in change of the characteristic of a threshold voltage V of a transistor and thus the deterioration of the interface, thereby reducing conductance. Here, since such electrons have the energy which is considerably larger than the thermal equilibrium value, these are called hot carriers.
FIG. 1
illustrates a conventional hot carrier measuring circuit. In the conventional hot carrier measuring circuit of
FIG. 1
, a plurality of inverters constitute a ring oscillator, each inverter being operated as a pulse generator. In such oscillator, an output from a first inverter is inputted to a second inverter and an output from the second inverter is inputted to a third inverter. Thus, an output of a (n−1)th inverter becomes an input of a nth inverter and an output of the nth inverter again becomes an input of the first inverter. Additionally, each inverter which serves as a pulse generator consists of a PMOS transistor and an NMOS transistor which are connected between a source voltage Vdd and a ground voltage Vss.
Accordingly, in the conventional art, the degradation of the NMOS and PMOS transistors is measured by separating drains
12
, gates
13
and sources
14
,
15
of the NMOS and PMOS transistors of a specific inverter from a pad of a bulk terminal and then performing the AC operation, that is operating the ring oscillator.
However, since the inverters, each serving as the pulse generator, have the same operation, it is impossible to individually analyze the effect according to rising time or falling time of a pulse signal. Further, the frequency of the ring oscillator is not varied in a uniform operational voltage.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a hot carrier measuring circuit which obviates the problems and disadvantages due to the conventional art.
An object of the present invention is to provide a hot carrier measuring circuit that analyzes the hot carrier characteristic of a device to be measured by generating pulse signals which have a desired frequency and various duty ratios in a silicon chip.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided a hot carrier measuring circuit including a pulse generator which generates at least two pulse signals which are partially overlapped with each other and have various duty ratios, a level shifter which shifts the pulse signals generated in the pulse generator to a desirable voltage level and a measuring device having at least one terminal which receives the pulse signals outputted from the level shifter.


REFERENCES:
patent: 5508632 (1996-04-01), Shimizu et al.
patent: 5600578 (1997-02-01), Fang et al.
patent: 5805508 (1998-09-01), Tobita
patent: 6047247 (2000-04-01), Iwanishi et al.
patent: 6073082 (2000-06-01), Maeda

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