Patent
1997-10-27
1999-07-13
Treat, William M.
39580034, 39580036, 39520038, G06F 1517
Patent
active
059238925
ABSTRACT:
A multiple processor circuit arrangement utilizes a host processor which controls the operational state of a coprocessor by programming internal control registers on the coprocessor. The host processor and coprocessor are coupled to an expansion bus, and the coprocessor is adapted to execute platform-independent code on behalf of the host processor. In addition, a stack-based processor utilizes a stack cache for accelerating stack access operations and thereby accelerating the overall performance of the processor. When the stack-based processor is utilized as the coprocessor in the aforementioned host/coprocessor computer system, the coprocessor is optimized to process platform-independent program code such as Java bytecodes, thereby permitting fast and efficient execution of both program code native to the master processor as well as platform-independent program code that is, effectively, native to the coprocessor.
REFERENCES:
patent: 5113522 (1992-05-01), Dinwidd, Jr. et al.
patent: 5218711 (1993-06-01), Yoshida
patent: 5764908 (1998-06-01), Shoji et al.
patent: 5778178 (1998-07-01), Arunachalam
patent: 5838165 (1998-11-01), Chatler
D. Evoy et al., U.S. Patent Application No. 08/757,151, Filed Nov. 27, 1996, entitled Master/Slave Multi-Processor Arrangement and Method Thereof, pp. 1-28.
LandOfFree
Host processor and coprocessor arrangement for processing platfo does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Host processor and coprocessor arrangement for processing platfo, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Host processor and coprocessor arrangement for processing platfo will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2286115