Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
1999-10-18
2001-02-20
Wong, Peter S. (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
C363S021030, C363S017000
Reexamination Certificate
active
06191958
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention p The present invention relates to a horizontal deflection apparatus. More specifically, the present invention relates to an apparatus for controlling a drive transistor of a horizontal deflection apparatus to reduce switching loss of the drive transistor.
(b) Description of the Related Art
A horizontal deflection apparatus uses horizontal synchronization signals and synchronization to generate sawtooth waves of 15.75 KHz, and provides the sawtooth waves to a horizontal deflection coil in order to scan electron beams of television cathode ray tubes (CRT) or computer monitors in the horizontal direction.
FIG. 1
is a circuit diagram illustrating a conventional horizontal deflection apparatus, and
FIG. 2
is a waveform diagram of an equivalent circuit of a controller of a drive transistor. A controller
100
of the drive transistor Q
2
is an equivalent circuit of a pulse transformer for providing a base current for the drive transistor Q
2
.
As shown in
FIG. 1
, a drive signal to operate a switch Q
1
is provided to the switch Q
1
from an internal microprocessor. When the switch Q
1
is turned on, an inductor current i
LB
is increased with the passage of time at a slope of V
B
/L
B
as shown in
FIG. 2
since this circuit adopts a forward converter method. Since carriers in the base layer move in the negative direction, the drive transistor Q
2
is turned off according to a base current i
B2
of the drive transistor Q
2
, and energy is stored in an inductor L
B
. At this time, when the carriers in the base layer are removed, the base current i
B2
of the drive transistor Q
2
goes into a completely off state, and the base current i
B2
of the drive transistor Q
2
becomes zero.
When the switch Q
1
is turned off, the inductor current i
LB
flows through the base of the drive transistor Q
2
in a state decreasing with the passage of time (i.e., at a negative slope) because of the time delay of the inductor L
B
. Therefore, the drive transistor is turned on. At this time, after the base current i
B2
of the drive transistor Q
2
is provided at a maximum value, the base current i
B2
is then gradually reduced but continuously maintained in an on state.
When the controller
100
of the drive transistor is operated as above, a resonance switch
110
of the horizontal deflection apparatus operates in four operation modes in an equivalent circuit such as that shown in FIG.
3
. Waveforms in the four operation modes are shown in FIG.
4
.
FIG.
3
(
a
) shows a first operation mode of the resonance switch
110
.
In the first operation mode, the drive transistor Q
2
is turned on so that a resonance is not generated, and an inductor current i
Ly
of a yoke coil L
y
is increased from a point t
0
to a point t
2
in FIG.
4
. It is assumed that the current i
Ly
flowing through the yoke coil L
y
flows through a diode D
2
coupled to the drive transistor Q
2
in parallel, and that the drive transistor Q
2
is turned off.
As shown in
FIG. 4
, when the diode D
2
is turned on at the point t
0
and a diode current i
D2
flows, a voltage between a collector and emitter of the drive transistor Q
2
becomes zero, and a capacitor Cx in
FIG. 1
is charged to generate a capacitor voltage Vx. Therefore, when the drive transistor Q
2
is turned on at a zero voltage point t
1
(i.e., when the switch Q
1
is turned off), a switching loss of the drive transistor Q
2
is very low because the switching operation is performed in a zero voltage state.
FIG.
3
(
b
) shows a second operation mode of the resonance switch
110
.
As shown, the second operation mode of the resonance switch
110
is performed between the interval t
2
and t
3
. Since the capacitor voltage Vx is provided, the diode D
2
is turned off and the current i
Ly
of the yoke inductor L
y
is increased from a negative direction to a positive direction, and a collector current i
C2
starts to gradually flow through the drive transistor Q
2
.
At this time, as shown in
FIG. 4
, a base current i
B2
of the drive transistor Q
2
is reduced from a very high value to a very low value in a zero voltage switching state because of a time delay of the inductor L
B
in FIG.
1
. On the other hand, a collector current i
C2
of the drive transistor Q
2
is gradually increased because of the yoke inductor L
y
. In the waveform of the base current i
B2
of
FIG. 4
, a current I
BF
represents a forward bias current to drive the drive transistor Q
2
, and a current I
BR
represents a reverse bias current to stop the drive transistor Q
2
.
The collector circuit i
C2
gradually increases up to a maximum value I
CP
, and when the current I
Ly
flowing to the yoke coil L
y
reaches a maximum value I
LP
, the second operation mode stops.
FIG.
3
(
c
) shows a third operation mode of the resonance switch
110
.
As shown, the third operation mode of the resonance switch
110
, which is performed between an interval t
3
and t
4
of
FIG. 4
, starts when the switch Q
1
is turned on, that is, when the drive transistor Q
2
is turned off. When the drive transistor Q
2
is turned off, the collector current i
C2
flowing through the drive transistor Q
2
is reduced, and the yoke coil current i
Ly
flows through a capacitor Cy coupled to the drive transistor Q
2
in parallel.
Therefore, as the capacitor Cy is charged, the voltage at the capacitor Cy steeply increases in a sine wave form, the voltage V
CE2
also increases as a sine wave, and the collector current i
C2
flowing through the drive transistor Q
2
steeply reduces. When a drive status is not maximized in this state, that is, if even a small collector current i
C2
flows, subsequent switching loss occurs.
The capacitor Cy is discharged by a serial resonance of the yoke coil Ly and the capacitor Cy, and the voltage at the capacitor Cy reduces in a sine wave form.
FIG.
3
(
d
) shows a fourth operation mode of the resonance switch
110
.
As shown, the fourth operation mode of the resonance switch
110
is performed after an interval t
4
of FIG.
4
. When the current is discharged from the capacitor Cy and the voltage at the capacitor Cy becomes negative, the diode D
2
coupled to the capacitor Cy in parallel is turned on to complete the fourth operation mode, and the yoke coil current i
Ly
flows through the diode D
2
, after which the mode returns to the first operation mode.
Characteristics of the switching loss in the vicinity of the point t
3
will now be described in detail.
FIG.
5
(
a
) is a diagram illustrating a switching loss under first base driving conditions during operation of a conventional horizontal deflection device, in which a horizontal deflection frequency is not changed but a magnitude of a base current is changed. Here, the solid lines represent reference base driving conditions, and the dotted lines represent the first base driving conditions.
As shown, when the base current i
B2
is reduced from the forward bias base current I
BF
to the reverse bias base current I
BR
under the reference base driving conditions of the drive transistor Q
2
, a voltage V
CE2
between the collector and emitter, and the collector voltage i
C2
of the drive transistor Q
2
are represented by the solid lines around and after the point t
3
.
When the reverse bias current I
BR
is not sufficiently small after the point t
3
, an off switching operation of the drive transistor Q
2
is not performed quickly so that the collector current i
C2
continues to flow. At this time, since the voltage VCE
2
steeply increases at the point t
3
, switching loss of the drive transistor Q
2
occurs.
To prevent this energy loss, when the forward bias base current I′
BF
and the reverse bias base current I′
BR
are reduced according to the first base driving conditions as shown by dotted lines in FIG.
5
(
a
), the voltage V′
CE2
is increased since the forward bias base current I′
BF
for turning on the drive transistor Q
2
is small. At this time, the collector current I′C
2
is increased to a maximum value before the point t
3
, th
Blakely & Sokoloff, Taylor & Zafman
Fairchild Korea Semiconductor Ltd.
Patel Rajnikant B.
Wong Peter S.
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