Hop method for stepping parallel hardware threads

Details Hop method for stepping parallel hardware threads Hop method for stepping parallel hardware threads

2005-09-13

2005-09-13

Vo, Ted T. (Department: 2192)

Data processing: software development, installation, and managem

Software program development tool

Testing or debugging

C717S130000, C717S131000

Reexamination Certificate

active

06944850

ABSTRACT:
A method of debugging software that executes in a multithreaded processor having a plurality of microengines includes pausing program execution in threads of execution within a target microengine, inserting a segment of executable code into an unused section of the target microengine's microstore, executing the segment of executable code in the target microengine and resuming program execution in the target microengine

REFERENCES:
patent: 5659749 (1997-08-01), Mitchell et al.
patent: 5815727 (1998-09-01), Motomura
Schulz et al., “A thread-aware debugger with an open interface”, ACM, pp.: 201-211, Aug. 2000.
Xu et al., “Dynamic Instrumentation of Thread Applications”, ACM, pp.: 1-11, May 1999.
Hardware Reference Manual, “Intel™ IXP1200 Network Processor Hardware Reference Manual”, http://www.hcs.ufl.edu/, version 1.0, pp.: 4.1-4.50, Jun. 2000.
Jacobson et al., “Asynchronous Microengines for Efficient High Level Control”, IEEE, pp.: 201-218, 1997.

Affiliated with

Also associated with

Rating

Hop method for stepping parallel hardware threads does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hop method for stepping parallel hardware threads, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hop method for stepping parallel hardware threads will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3381491