Highly tunable metal-on-semiconductor trench varactor

Active solid-state devices (e.g. – transistors – solid-state diode – Voltage variable capacitance device – With means to increase active junction area

Reexamination Certificate

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Details

C257S312000, C257S532000, C257S595000, C257SE29344

Reexamination Certificate

active

07989922

ABSTRACT:
An array of deep trenches is formed in a doped portion of the semiconductor substrate, which forms a lower electrode. A dielectric layer is formed on the sidewalls of the array of deep trenches. The array of deep trenches is filled with a doped semiconductor material to form an upper electrode comprising a top plate portion and a plurality of extension portions into the array of trenches. In a depletion mode, the bias condition across the dielectric layer depletes majority carriers within the top electrode, thus providing a low capacitance. In an accumulation mode, the bias condition attracts majority carriers toward the dielectric layer, providing a high capacitance. Thus, the trench metal-oxide-semiconductor (MOS) varactor provides a variable capacitance depending on the polarity of the bias.

REFERENCES:
patent: 3962713 (1976-06-01), Kendall et al.
patent: 4694561 (1987-09-01), Lebowitz et al.
patent: 6661069 (2003-12-01), Chinthakindi et al.
patent: 7129801 (2006-10-01), Wu
patent: 2003/0183866 (2003-10-01), Sanchez et al.
patent: 2006/0094184 (2006-05-01), Katsumata
patent: 2006/0273426 (2006-12-01), Iijima
patent: 2008/0157159 (2008-07-01), Hook et al.

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